diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2025-10-22 19:10:54 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2025-10-24 11:31:43 +0300 |
| commit | 0790925dadad0997580df6e32cdccd54316807f2 (patch) | |
| tree | b48e1d8a61c6ca1e028081ad7a437c46d93a7351 | |
| parent | 68aeace1b15ae5eaa37566fa6f09a2cbc6399a70 (diff) | |
drm/{i915,xe}/fbdev: add intel_fbdev_fb_pitch_align()
For reasons still unknown, xe appears to require a stride alignment of
XE_PAGE_SIZE, and using 64 leads to sporadic failures. Go back to having
separate stride alignment for i915 and xe, until the issue is root
caused.
v2: Add FIXME comment, reference issue with Link (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Maarten Lankhorst <maarten@lankhorst.se>
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/6220
Fixes: 4a36b339a14a ("drm/xe/fbdev: use the same 64-byte stride alignment as i915")
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/ae51d1e224048bdc87bf7a56d8f5ebd0fbb6a383.1756931441.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/20251022161054.708388-1-jani.nikula@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fbdev.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fbdev_fb.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fbdev_fb.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 11 |
4 files changed, 20 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c index 51d3d87caf43..d5c001761aa0 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev.c +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c @@ -218,7 +218,7 @@ static void intel_fbdev_fill_mode_cmd(struct drm_fb_helper_surface_size *sizes, mode_cmd->width = sizes->surface_width; mode_cmd->height = sizes->surface_height; - mode_cmd->pitches[0] = ALIGN(mode_cmd->width * DIV_ROUND_UP(sizes->surface_bpp, 8), 64); + mode_cmd->pitches[0] = intel_fbdev_fb_pitch_align(mode_cmd->width * DIV_ROUND_UP(sizes->surface_bpp, 8)); mode_cmd->pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth); mode_cmd->modifier[0] = DRM_FORMAT_MOD_LINEAR; diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c index 56b145841473..0838fdd37254 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c +++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c @@ -10,6 +10,11 @@ #include "i915_drv.h" #include "intel_fbdev_fb.h" +u32 intel_fbdev_fb_pitch_align(u32 stride) +{ + return ALIGN(stride, 64); +} + struct drm_gem_object *intel_fbdev_fb_bo_create(struct drm_device *drm, int size) { struct drm_i915_private *dev_priv = to_i915(drm); diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h index 1fa44ed28543..fd0b3775dc1f 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h +++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h @@ -6,12 +6,15 @@ #ifndef __INTEL_FBDEV_FB_H__ #define __INTEL_FBDEV_FB_H__ +#include <linux/types.h> + struct drm_device; struct drm_gem_object; struct drm_mode_fb_cmd2; struct fb_info; struct i915_vma; +u32 intel_fbdev_fb_pitch_align(u32 stride); struct drm_gem_object *intel_fbdev_fb_bo_create(struct drm_device *drm, int size); void intel_fbdev_fb_bo_destroy(struct drm_gem_object *obj); int intel_fbdev_fb_fill_info(struct drm_device *drm, struct fb_info *info, diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c index 35a5b07eeba4..83eaf9263c6b 100644 --- a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c +++ b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c @@ -12,6 +12,17 @@ #include <generated/xe_wa_oob.h> +/* + * FIXME: There shouldn't be any reason to have XE_PAGE_SIZE stride + * alignment. The same 64 as i915 uses should be fine, and we shouldn't need to + * have driver specific values. However, dropping the stride alignment to 64 + * leads to underflowing the bo pin count in the atomic cleanup work. + */ +u32 intel_fbdev_fb_pitch_align(u32 stride) +{ + return ALIGN(stride, XE_PAGE_SIZE); +} + struct drm_gem_object *intel_fbdev_fb_bo_create(struct drm_device *drm, int size) { struct xe_device *xe = to_xe_device(drm); |