diff options
| author | Christian Bruel <christian.bruel@foss.st.com> | 2025-08-20 09:54:11 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2025-09-15 17:51:30 +0200 |
| commit | 30793e0108942cb086ae9febfa5bf736453013e7 (patch) | |
| tree | dfe94d531aa085be4d8b11ed551444786a727d27 | |
| parent | 73d536ae1a43015dd184e5ced6879f61c8907bca (diff) | |
arm64: dts: st: Enable PCIe on the stm32mp257f-ev1 board
Add PCIe RC and EP support on stm32mp257f-ev1 board.
Default to RC mode.
Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Link: https://lore.kernel.org/r/20250820075411.1178729-12-christian.bruel@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
| -rw-r--r-- | arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 4ff334563599..d25d16c3681f 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -230,6 +230,27 @@ }; }; +&pcie_ep { + pinctrl-names = "default", "init"; + pinctrl-0 = <&pcie_pins_a>; + pinctrl-1 = <&pcie_init_pins_a>; + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + status = "disabled"; +}; + +&pcie_rc { + pinctrl-names = "default", "init", "sleep"; + pinctrl-0 = <&pcie_pins_a>; + pinctrl-1 = <&pcie_init_pins_a>; + pinctrl-2 = <&pcie_sleep_pins_a>; + status = "okay"; + + pcie@0,0 { + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; +}; + &rtc { status = "okay"; }; |