diff options
| author | Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> | 2025-11-14 18:10:40 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-11-17 00:49:54 +0000 |
| commit | 716d0a0a2ab00c601120c19bb357f4373f4722d1 (patch) | |
| tree | f5cfaab2cb30c799aff2eb762984cf16de89c04e | |
| parent | c94f134729491ab60fc68fcd919821014334db97 (diff) | |
spi: aspeed: Enable Quad SPI mode for page program
Ensure the controller switches to quad I/O mode when
spi-tx-bus-width dts property is 4 and the Quad SPI program
opcode (32h or 34h) is used. Without this change, high-bit
data will be lost during page programming.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Link: https://patch.msgid.link/20251114101042.1520997-3-chin-ting_kuo@aspeedtech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/spi/spi-aspeed-smc.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c index 179c47ffbfeb..4163632fed8b 100644 --- a/drivers/spi/spi-aspeed-smc.c +++ b/drivers/spi/spi-aspeed-smc.c @@ -263,11 +263,15 @@ static ssize_t aspeed_spi_write_user(struct aspeed_spi_chip *chip, const struct spi_mem_op *op) { int ret; + int io_mode = aspeed_spi_get_io_mode(op); aspeed_spi_start_user(chip); ret = aspeed_spi_send_cmd_addr(chip, op->addr.nbytes, op->addr.val, op->cmd.opcode); if (ret < 0) goto stop_user; + + aspeed_spi_set_io_mode(chip, io_mode); + aspeed_spi_write_to_ahb(chip->ahb_base, op->data.buf.out, op->data.nbytes); stop_user: aspeed_spi_stop_user(chip); |