diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-08-22 14:04:06 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-08-23 21:37:16 -0500 |
| commit | b8159aaf5ece22de52276d75b8b7d5ec517fe207 (patch) | |
| tree | 873e2beaed235becf1f67ca418fa9345bda76a07 | |
| parent | 6cfdee6dca1e5073b52eda54fceb193a80651576 (diff) | |
arm64: dts: qcom: sm6150: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:
sm6150.dtsi:1122.4-1125.30: Warning (interrupt_map): /soc@0/pcie@1c08000:interrupt-map:
Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback
Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
the fourth component "parent unit address", which size is defined by
'#address-cells' of the node pointed to by the interrupt-parent
component, is not used (=0).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-6-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm6150.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi index 47ace8d414c0..53496241479a 100644 --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi @@ -3735,6 +3735,7 @@ reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <0>; #interrupt-cells = <3>; interrupt-controller; #redistributor-regions = <1>; |