diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-18 09:34:02 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-18 09:34:02 -0700 |
| commit | b3ce7a30847a54a7f96a35e609303d8afecd460b (patch) | |
| tree | 81fb53546e55b9c670da4476b4b0b27e57abb25d /drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | |
| parent | b1bc554e009e3aeed7e4cfd2e717c7a34a98c683 (diff) | |
| parent | 478a52707b0abe98aac7f8c53ccddb759be66b06 (diff) | |
Merge tag 'drm-next-2024-07-18' of https://gitlab.freedesktop.org/drm/kernel
Pull drm updates from Dave Airlie:
"There's a lot of stuff in here, amd, i915 and xe have new platform
work, lots of core rework around EDID handling, some new COMPILE_TEST
options, maintainer changes and a lots of other stuff. Summary:
core:
- deprecate DRM data and return 0 date
- connector: Create a set of helpers to help with HDMI support
- Remove driver owner assignments
- Allow more drivers to compile with COMPILE_TEST
- Conversions to drm_edid
- Sprinkle MODULE_DESCRIPTIONS everywhere they are missing
- Remove drm_mm_replace_node
- print: Add a drm prefix to warn level messages too, remove
___drm_dbg, consolidate prefix handling
- New monochrome TV mode variant
ttm:
- improve number of page faults on some platforms
- fix test builds under PREEMPT_RT
- more test coverage
ci:
- Require a more recent version of mesa
- improve farm setup and test generation
dma-buf:
- warn if reserving 0 fence slots
- internal API heap enhancements
fbdev:
- Create memory manager optimized fbdev emulation
panic:
- Allow to select fonts
- improve drm_fb_dma_get_scanout_buffer
- Allow to dump kmsg to the screen
bridge:
- Remove redundant checks on bridge->encoder
- Remove drm_bridge_chain_mode_fixup
- bridge-connector: Plumb in the new HDMI helper
- analogix_dp: Various improvements, handle AUX transfers timeout
- samsung-dsim: Fix timings calculation
- tc358767: Plenty of small fixes, fix no connector attach, fix
clocks
- sii902x: state validation improvements
panels:
- Switch panels from register table initialization to proper code
- Now that the panel code tracks the panel state, remove every ad-hoc
implementation in the panel drivers
- More cleanup of prepare / enable state tracking in drivers
- edp: Drop legacy panel compatibles
- simple-bridge: Switch to devm_drm_bridge_add
- New panels: Lincoln Tech Sol LCD185-101CT, Microtips Technology
13-101HIEBCAF0-C, Microtips Technology MF-103HIEB0GA0,
BOE nv110wum-l60, IVO t109nw41, WL-355608-A8, PrimeView
PM070WL4, Lincoln Technologies LCD197, Ortustech
COM35H3P70ULC, AUO G104STN01, K&d kd101ne3-40ti
amdgpu:
- DCN 4.0.x support
- GC 12.0 support
- GMC 12.0 support
- SDMA 7.0 support
- MES12 support
- MMHUB 4.1 support
- GFX12 modifier and DCC support
- lots of IP fixes/updates
amdkfd:
- Contiguous VRAM allocations
- GC 12.0 support
- SDMA 7.0 support
- SR-IOV fixes
- KFD GFX ALU exceptions
i915:
- Battlemage Xe2 HPD display enablement
- Panel Replay enabling
- DP AUX-less ALPM/LOBF
- Enable link training failure fallback for DP MST links
- CMRR (Content Match Refresh Rate) enabling
- Increase ADL-S/ADL-P/DG2+ max TMDS bitrate to 6 Gbps
- Enable eDP AUX based HDR backlight
- Support replaying GPU hangs with captured context image
- Automate CCS Mode setting during engine resets
- lots of refactoring
- Support replaying GPU hangs with captured context image
- Increase FLR timeout from 3s to 9s
- Enable w/a 16021333562 for DG2, MTL and ARL [guc]
xe:
- update MAINATINERS
- New uapi adding OA functionality to Xe
- expose l3 bank mask
- fix display detect on ADL-N
- runtime PM Fixes
- Fix silent backmerge issues
- More prep for SR-IOV
- HWmon additions
- per client usage info
- Rework GPU page fault handling
- Drop EXEC_QUEUE_FLAG_BANNED
- Add BMG PCI IDs
- Scheduler fixes and improvements
- Rename xe_exec_queue::compute to xe_exec_queue::lr
- Use ttm_uncached for BO with NEEDS_UC flag
- Rename xe perf layer as xe observation layer
- lots of refactoring
radeon:
- Backlight workaround for iMac
- Silence UBSAN flex array warnings
msm:
- Validate registers XML description against schema in CI
- core/dpu: SM7150 support
- mdp5: Add support for MSM8937
- gpu: Add param for userspace to know if raytracing is supported
- gpu: X185 support (aka gpu in X1 laptop chips)
- gpu: a505 support
ivpu:
- hardware scheduler support
- profiling support
- improvements to the platform support layer
- firmware handling improvements
- clocks/power mgmt improvements
- scheduler/logging improvements
habanalabs:
- Gradual sleep in polling memory macro
- Reduce Gaudi2 MSI-X interrupt count to 128
- Add Gaudi2-D revision support
- Add timestamp to CPLD info
- Gaudi2: Assume hard-reset by firmware upon MC SEI severe error
- Align Gaudi2 interrupt names
- Check for errors after preboot is ready
- Change habanalabs maintainer and git repo path
mgag200:
- refactoring and improvements
- Add BMC output
- enable polling
nouveau:
- add registry command line
v3d:
- perf counters improvements
zynqmp:
- irq and debugfs improvements
atmel-hlcdc:
- Support XLCDC in sam9x7
mipi-dbi:
- Remove mipi_dbi_machine_little_endian
- make SPI bits per word configurable
- support RGB888
- allow pixel formats to be specified in the DT
sun4i:
- Rework the blender setup for DE2
panfrost:
- Enable MT8188 support
vc4:
- Monochrome TV support
exynos:
- fix fallback mode regression
- fix memory leak
- Use drm_edid_duplicate() instead of kmemdup()
etnaviv:
- fix i.MX8MP NPU clock gating
- workaround FE register cdc issues on some cores
- fix DMA sync handling for cached buffers
- fix job timeout handling
- keep TS enabled on MMUv2 cores for improved performance
mediatek:
- Convert to platform remove callback returning void-
- Drop chain_mode_fixup call in mode_valid()
- Fixes the errors of MediaTek display driver found by IGT
- Add display support for the MT8365-EVK board
- Fix bit depth overwritten for mtk_ovl_set bit_depth()
- Fix possible_crtcs calculation
- Fix spurious kfree()
ast:
- refactor mode setting code
stm:
- Add LVDS support
- DSI PHY updates"
* tag 'drm-next-2024-07-18' of https://gitlab.freedesktop.org/drm/kernel: (2501 commits)
drm/amdgpu/mes12: add missing opcode string
drm/amdgpu/mes11: update opcode strings
Revert "drm/amd/display: Reset freesync config before update new state"
drm/omap: Restrict compile testing to PAGE_SIZE less than 64KB
drm/xe: Drop trace_xe_hw_fence_free
drm/xe/uapi: Rename xe perf layer as xe observation layer
drm/amdgpu: remove exp hw support check for gfx12
drm/amdgpu: timely save bad pages to eeprom after gpu ras reset is completed
drm/amdgpu: flush all cached ras bad pages to eeprom
drm/amdgpu: select compute ME engines dynamically
drm/amd/display: Allow display DCC for DCN401
drm/amdgpu: select compute ME engines dynamically
drm/amdgpu/job: Replace DRM_INFO/ERROR logging
drm/amdgpu: select compute ME engines dynamically
drm/amd/pm: Ignore initial value in smu response register
drm/amdgpu: Initialize VF partition mode
drm/amd/amdgpu: fix SDMA IRQ client ID <-> req mapping
MAINTAINERS: fix Xinhui's name
MAINTAINERS: update powerplay and swsmu
drm/qxl: Pin buffer objects for internal mappings
...
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 726 |
1 files changed, 611 insertions, 115 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h index 34a398f23fc6..40a9b3471208 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h @@ -1,4 +1,5 @@ -/* Copyright 2012-15 Advanced Micro Devices, Inc. +/* + * Copyright 2012-15 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -96,6 +97,29 @@ enum mpcc_alpha_blend_mode { MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA }; +enum mpcc_movable_cm_location { + MPCC_MOVABLE_CM_LOCATION_BEFORE, + MPCC_MOVABLE_CM_LOCATION_AFTER, +}; + +enum MCM_LUT_XABLE { + MCM_LUT_DISABLE, + MCM_LUT_DISABLED = MCM_LUT_DISABLE, + MCM_LUT_ENABLE, + MCM_LUT_ENABLED = MCM_LUT_ENABLE, +}; + +enum MCM_LUT_ID { + MCM_LUT_3DLUT, + MCM_LUT_1DLUT, + MCM_LUT_SHAPER +}; + +union mcm_lut_params { + const struct pwl_params *pwl; + const struct tetrahedral_params *lut3d; +}; + /** * struct mpcc_blnd_cfg - MPCC blending configuration */ @@ -163,6 +187,7 @@ struct mpcc_blnd_cfg { struct mpc_grph_gamut_adjustment { struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE]; enum graphics_gamut_adjust_type gamut_adjust_type; + enum mpcc_gamut_remap_id mpcc_gamut_remap_block_id; }; struct mpcc_sm_cfg { @@ -282,33 +307,48 @@ struct mpcc_state { * struct mpc_funcs - funcs */ struct mpc_funcs { + /** + * @read_mpcc_state: + * + * Read register content from given MPCC physical instance. + * + * Parameters: + * + * - [in/out] mpc - MPC context + * - [in] mpcc_instance - MPC context instance + * - [in] mpcc_state - MPC context state + * + * Return: + * + * void + */ void (*read_mpcc_state)( struct mpc *mpc, int mpcc_inst, struct mpcc_state *s); /** - * @insert_plane: - * - * Insert DPP into MPC tree based on specified blending position. - * Only used for planes that are part of blending chain for OPP output - * - * Parameters: - * - * - [in/out] mpc - MPC context. - * - [in/out] tree - MPC tree structure that plane will be added to. - * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. - * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. - * stereo mix must disable for the very bottom layer of the tree config. - * - [in] insert_above_mpcc - Insert new plane above this MPCC. - * If NULL, insert as bottom plane. - * - [in] dpp_id - DPP instance for the plane to be added. - * - [in] mpcc_id - The MPCC physical instance to use for blending. - * - * Return: - * - * struct mpcc* - MPCC that was added. - */ + * @insert_plane: + * + * Insert DPP into MPC tree based on specified blending position. + * Only used for planes that are part of blending chain for OPP output + * + * Parameters: + * + * - [in/out] mpc - MPC context. + * - [in/out] tree - MPC tree structure that plane will be added to. + * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. + * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. + * stereo mix must disable for the very bottom layer of the tree config. + * - [in] insert_above_mpcc - Insert new plane above this MPCC. + * If NULL, insert as bottom plane. + * - [in] dpp_id - DPP instance for the plane to be added. + * - [in] mpcc_id - The MPCC physical instance to use for blending. + * + * Return: + * + * struct mpcc* - MPCC that was added. + */ struct mpcc* (*insert_plane)( struct mpc *mpc, struct mpc_tree *tree, @@ -319,107 +359,117 @@ struct mpc_funcs { int mpcc_id); /** - * @remove_mpcc: - * - * Remove a specified MPCC from the MPC tree. - * - * Parameters: - * - * - [in/out] mpc - MPC context. - * - [in/out] tree - MPC tree structure that plane will be removed from. - * - [in/out] mpcc - MPCC to be removed from tree. - * - * Return: - * - * void - */ + * @remove_mpcc: + * + * Remove a specified MPCC from the MPC tree. + * + * Parameters: + * + * - [in/out] mpc - MPC context. + * - [in/out] tree - MPC tree structure that plane will be removed from. + * - [in/out] mpcc - MPCC to be removed from tree. + * + * Return: + * + * void + */ void (*remove_mpcc)( struct mpc *mpc, struct mpc_tree *tree, struct mpcc *mpcc); /** - * @mpc_init: - * - * Reset the MPCC HW status by disconnecting all muxes. - * - * Parameters: - * - * - [in/out] mpc - MPC context. - * - * Return: - * - * void - */ + * @mpc_init: + * + * Reset the MPCC HW status by disconnecting all muxes. + * + * Parameters: + * + * - [in/out] mpc - MPC context. + * + * Return: + * + * void + */ void (*mpc_init)(struct mpc *mpc); + + /** + * @mpc_init_single_inst: + * + * Initialize given MPCC physical instance. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] mpcc_id - The MPCC physical instance to be initialized. + */ void (*mpc_init_single_inst)( struct mpc *mpc, unsigned int mpcc_id); /** - * @update_blending: - * - * Update the blending configuration for a specified MPCC. - * - * Parameters: - * - * - [in/out] mpc - MPC context. - * - [in] blnd_cfg - MPCC blending configuration. - * - [in] mpcc_id - The MPCC physical instance. - * - * Return: - * - * void - */ + * @update_blending: + * + * Update the blending configuration for a specified MPCC. + * + * Parameters: + * + * - [in/out] mpc - MPC context. + * - [in] blnd_cfg - MPCC blending configuration. + * - [in] mpcc_id - The MPCC physical instance. + * + * Return: + * + * void + */ void (*update_blending)( struct mpc *mpc, struct mpcc_blnd_cfg *blnd_cfg, int mpcc_id); /** - * @cursor_lock: - * - * Lock cursor updates for the specified OPP. OPP defines the set of - * MPCC that are locked together for cursor. - * - * Parameters: - * - * - [in] mpc - MPC context. - * - [in] opp_id - The OPP to lock cursor updates on - * - [in] lock - lock/unlock the OPP - * - * Return: - * - * void - */ + * @cursor_lock: + * + * Lock cursor updates for the specified OPP. OPP defines the set of + * MPCC that are locked together for cursor. + * + * Parameters: + * + * - [in] mpc - MPC context. + * - [in] opp_id - The OPP to lock cursor updates on + * - [in] lock - lock/unlock the OPP + * + * Return: + * + * void + */ void (*cursor_lock)( struct mpc *mpc, int opp_id, bool lock); /** - * @insert_plane_to_secondary: - * - * Add DPP into secondary MPC tree based on specified blending - * position. Only used for planes that are part of blending chain for - * DWB output - * - * Parameters: - * - * - [in/out] mpc - MPC context. - * - [in/out] tree - MPC tree structure that plane will be added to. - * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. - * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. - * stereo mix must disable for the very bottom layer of the tree config. - * - [in] insert_above_mpcc - Insert new plane above this MPCC. If - * NULL, insert as bottom plane. - * - [in] dpp_id - DPP instance for the plane to be added. - * - [in] mpcc_id - The MPCC physical instance to use for blending. - * - * Return: - * - * struct mpcc* - MPCC that was added. - */ + * @insert_plane_to_secondary: + * + * Add DPP into secondary MPC tree based on specified blending + * position. Only used for planes that are part of blending chain for + * DWB output + * + * Parameters: + * + * - [in/out] mpc - MPC context. + * - [in/out] tree - MPC tree structure that plane will be added to. + * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. + * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. + * stereo mix must disable for the very bottom layer of the tree config. + * - [in] insert_above_mpcc - Insert new plane above this MPCC. If + * NULL, insert as bottom plane. + * - [in] dpp_id - DPP instance for the plane to be added. + * - [in] mpcc_id - The MPCC physical instance to use for blending. + * + * Return: + * + * struct mpcc* - MPCC that was added. + */ struct mpcc* (*insert_plane_to_secondary)( struct mpc *mpc, struct mpc_tree *tree, @@ -430,81 +480,301 @@ struct mpc_funcs { int mpcc_id); /** - * @remove_mpcc_from_secondary: - * - * Remove a specified DPP from the 'secondary' MPC tree. - * - * Parameters: - * - * - [in/out] mpc - MPC context. - * - [in/out] tree - MPC tree structure that plane will be removed from. - * - [in] mpcc - MPCC to be removed from tree. - * - * Return: - * - * void - */ + * @remove_mpcc_from_secondary: + * + * Remove a specified DPP from the 'secondary' MPC tree. + * + * Parameters: + * + * - [in/out] mpc - MPC context. + * - [in/out] tree - MPC tree structure that plane will be removed from. + * - [in] mpcc - MPCC to be removed from tree. + * + * Return: + * + * void + */ void (*remove_mpcc_from_secondary)( struct mpc *mpc, struct mpc_tree *tree, struct mpcc *mpcc); + /** + * @get_mpcc_for_dpp_from_secondary: + * + * Find, if it exists, a MPCC from a given 'secondary' MPC tree that + * is associated with specified plane. + * + * Parameters: + * - [in/out] tree - MPC tree structure to search for plane. + * - [in] dpp_id - DPP to be searched. + * + * Return: + * + * struct mpcc* - pointer to plane or NULL if no plane found. + */ struct mpcc* (*get_mpcc_for_dpp_from_secondary)( struct mpc_tree *tree, int dpp_id); + /** + * @get_mpcc_for_dpp: + * + * Find, if it exists, a MPCC from a given MPC tree that + * is associated with specified plane. + * + * Parameters: + * - [in/out] tree - MPC tree structure to search for plane. + * - [in] dpp_id - DPP to be searched. + * + * Return: + * + * struct mpcc* - pointer to plane or NULL if no plane found. + */ struct mpcc* (*get_mpcc_for_dpp)( struct mpc_tree *tree, int dpp_id); + /** + * @wait_for_idle: + * + * Wait for a MPCC in MPC context to enter idle state. + * + * Parameters: + * - [in/out] mpc - MPC Context. + * - [in] id - MPCC to wait for idle state. + * + * Return: + * + * void + */ void (*wait_for_idle)(struct mpc *mpc, int id); + /** + * @assert_mpcc_idle_before_connect: + * + * Assert if MPCC in MPC context is in idle state. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] id - MPCC to assert idle state. + * + * Return: + * + * void + */ void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id); + /** + * @init_mpcc_list_from_hw: + * + * Iterate through the MPCC array from a given MPC context struct + * and configure each MPCC according to its registers' values. + * + * Parameters: + * - [in/out] mpc - MPC context to initialize MPCC array. + * - [in/out] tree - MPC tree structure containing MPCC contexts to initialize. + * + * Return: + * + * void + */ void (*init_mpcc_list_from_hw)( struct mpc *mpc, struct mpc_tree *tree); + /** + * @set_denorm: + * + * Set corresponding OPP DENORM_CONTROL register value to specific denorm_mode + * based on given color depth. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] opp_id - Corresponding OPP to update register. + * - [in] output_depth - Arbitrary color depth to set denorm_mode. + * + * Return: + * + * void + */ void (*set_denorm)(struct mpc *mpc, int opp_id, enum dc_color_depth output_depth); + /** + * @set_denorm_clamp: + * + * Set denorm clamp values on corresponding OPP DENORM CONTROL register. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] opp_id - Corresponding OPP to update register. + * - [in] denorm_clamp - Arbitrary denorm clamp to be set. + * + * Return: + * + * void + */ void (*set_denorm_clamp)( struct mpc *mpc, int opp_id, struct mpc_denorm_clamp denorm_clamp); + /** + * @set_output_csc: + * + * Set the Output Color Space Conversion matrix + * with given values and mode. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] opp_id - Corresponding OPP to update register. + * - [in] regval - Values to set in CSC matrix. + * - [in] ocsc_mode - Mode to set CSC. + * + * Return: + * + * void + */ void (*set_output_csc)(struct mpc *mpc, int opp_id, const uint16_t *regval, enum mpc_output_csc_mode ocsc_mode); + /** + * @set_ocsc_default: + * + * Set the Output Color Space Conversion matrix + * to default values according to color space. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] opp_id - Corresponding OPP to update register. + * - [in] color_space - OCSC color space. + * - [in] ocsc_mode - Mode to set CSC. + * + * Return: + * + * void + * + */ void (*set_ocsc_default)(struct mpc *mpc, int opp_id, enum dc_color_space color_space, enum mpc_output_csc_mode ocsc_mode); + /** + * @set_output_gamma: + * + * Set Output Gamma with given curve parameters. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] mpcc_id - Corresponding MPC to update registers. + * - [in] params - Parameters. + * + * Return: + * + * void + * + */ void (*set_output_gamma)( struct mpc *mpc, int mpcc_id, const struct pwl_params *params); + /** + * @power_on_mpc_mem_pwr: + * + * Power on/off memory LUT for given MPCC. + * Powering on enables LUT to be updated. + * Powering off allows entering low power mode. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] mpcc_id - MPCC to power on. + * - [in] power_on + * + * Return: + * + * void + */ void (*power_on_mpc_mem_pwr)( struct mpc *mpc, int mpcc_id, bool power_on); + /** + * @set_dwb_mux: + * + * Set corresponding Display Writeback mux + * MPC register field to given MPCC id. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] dwb_id - DWB to be set. + * - [in] mpcc_id - MPCC id to be stored in DWB mux register. + * + * Return: + * + * void + */ void (*set_dwb_mux)( struct mpc *mpc, int dwb_id, int mpcc_id); + /** + * @disable_dwb_mux: + * + * Reset corresponding Display Writeback mux + * MPC register field. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] dwb_id - DWB to be set. + * + * Return: + * + * void + */ void (*disable_dwb_mux)( struct mpc *mpc, int dwb_id); + /** + * @is_dwb_idle: + * + * Check DWB status on MPC_DWB0_MUX_STATUS register field. + * Return if it is null. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] dwb_id - DWB to be checked. + * + * Return: + * + * bool - wheter DWB is idle or not + */ bool (*is_dwb_idle)( struct mpc *mpc, int dwb_id); + /** + * @set_out_rate_control: + * + * Set display output rate control. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] opp_id - OPP to be set. + * - [in] enable + * - [in] rate_2x_mode + * - [in] flow_control + * + * Return: + * + * void + */ void (*set_out_rate_control)( struct mpc *mpc, int opp_id, @@ -512,38 +782,264 @@ struct mpc_funcs { bool rate_2x_mode, struct mpc_dwb_flow_control *flow_control); + /** + * @set_gamut_remap: + * + * Set post-blending CTM for given MPCC. + * + * Parameters: + * - [in] mpc - MPC context. + * - [in] mpcc_id - MPCC to set gamut map. + * - [in] adjust + * + * Return: + * + * void + */ void (*set_gamut_remap)( struct mpc *mpc, int mpcc_id, const struct mpc_grph_gamut_adjustment *adjust); + /** + * @program_1dlut: + * + * Set 1 dimensional Lookup Table. + * + * Parameters: + * - [in/out] mpc - MPC context + * - [in] params - curve parameters for the LUT configuration + * - [in] rmu_idx + * + * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). + */ bool (*program_1dlut)( struct mpc *mpc, const struct pwl_params *params, uint32_t rmu_idx); + /** + * @program_shaper: + * + * Set shaper. + * + * Parameters: + * - [in/out] mpc - MPC context + * - [in] params - curve parameters to be set + * - [in] rmu_idx + * + * Return: + * + * bool - wheter shaper was set (set with given parameters) or not (params is NULL and LUT is disabled). + */ bool (*program_shaper)( struct mpc *mpc, const struct pwl_params *params, uint32_t rmu_idx); + /** + * @acquire_rmu: + * + * Set given MPCC to be multiplexed to given RMU unit. + * + * Parameters: + * - [in/out] mpc - MPC context + * - [in] mpcc_id - MPCC + * - [in] rmu_idx - Given RMU unit to set MPCC to be multiplexed to. + * + * Return: + * + * unit32_t - rmu_idx if operation was successful, -1 else. + */ uint32_t (*acquire_rmu)(struct mpc *mpc, int mpcc_id, int rmu_idx); + /** + * @program_3dlut: + * + * Set 3 dimensional Lookup Table. + * + * Parameters: + * - [in/out] mpc - MPC context + * - [in] params - tetrahedral parameters for the LUT configuration + * - [in] rmu_idx + * + * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). + */ bool (*program_3dlut)( struct mpc *mpc, const struct tetrahedral_params *params, int rmu_idx); + /** + * @release_rmu: + * + * For a given MPCC, release the RMU unit it muliplexes to. + * + * Parameters: + * - [in/out] mpc - MPC context + * - [in] mpcc_id - MPCC + * + * Return: + * + * int - a valid rmu_idx representing released RMU unit or -1 if there was no RMU unit to release. + */ int (*release_rmu)(struct mpc *mpc, int mpcc_id); + /** + * @get_mpc_out_mux: + * + * Return MPC out mux. + * + * Parameters: + * - [in] mpc - MPC context. + * - [in] opp_id - OPP + * + * Return: + * + * unsigned int - Out Mux + */ unsigned int (*get_mpc_out_mux)( - struct mpc *mpc, - int opp_id); + struct mpc *mpc, + int opp_id); + /** + * @set_bg_color: + * + * Find corresponding bottommost MPCC and + * set its bg color. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] bg_color - background color to be set. + * - [in] mpcc_id + * + * Return: + * + * void + */ void (*set_bg_color)(struct mpc *mpc, struct tg_color *bg_color, int mpcc_id); + + /** + * @set_mpc_mem_lp_mode: + * + * Set mpc_mem_lp_mode. + * + * Parameters: + * - [in/out] mpc - MPC context. + * + * Return: + * + * void + */ + void (*set_mpc_mem_lp_mode)(struct mpc *mpc); + /** + * @set_movable_cm_location: + * + * Set Movable CM Location. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] location + * - [in] mpcc_id + * + * Return: + * + * void + */ + + void (*set_movable_cm_location)(struct mpc *mpc, enum mpcc_movable_cm_location location, int mpcc_id); + /** + * @update_3dlut_fast_load_select: + * + * Update 3D LUT fast load select. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] mpcc_id + * - [in] hubp_idx + * + * Return: + * + * void + */ + + void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx); + /** + * @get_3dlut_fast_load_status: + * + * Get 3D LUT fast load status and reference them with done, soft_underflow and hard_underflow pointers. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] mpcc_id + * - [in/out] done + * - [in/out] soft_underflow + * - [in/out] hard_underflow + * + * Return: + * + * void + */ + void (*get_3dlut_fast_load_status)(struct mpc *mpc, int mpcc_id, uint32_t *done, uint32_t *soft_underflow, uint32_t *hard_underflow); + + /** + * @populate_lut: + * + * Populate LUT with given tetrahedral parameters. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] id + * - [in] params + * - [in] lut_bank_a + * - [in] mpcc_id + * + * Return: + * + * void + */ + void (*populate_lut)(struct mpc *mpc, const enum MCM_LUT_ID id, const union mcm_lut_params params, + bool lut_bank_a, int mpcc_id); + + /** + * @program_lut_read_write_control: + * + * Program LUT RW control. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] id + * - [in] lut_bank_a + * - [in] mpcc_id + * + * Return: + * + * void + */ + void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, bool lut_bank_a, int mpcc_id); + + /** + * @program_lut_mode: + * + * Program LUT mode. + * + * Parameters: + * - [in/out] mpc - MPC context. + * - [in] id + * - [in] xable + * - [in] lut_bank_a + * - [in] mpcc_id + * + * Return: + * + * void + */ + void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_ID id, const enum MCM_LUT_XABLE xable, + bool lut_bank_a, int mpcc_id); + void (*program_3dlut_size)(struct mpc *mpc, bool is_17x17x17, int mpcc_id); }; #endif |