diff options
| author | Fangzhi Zuo <Jerry.Zuo@amd.com> | 2021-08-03 18:46:00 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-09-01 16:55:10 -0400 |
| commit | f01ee019586220c86f238263a4fbde6e72085e11 (patch) | |
| tree | 7cc06dedf7dbae7cec4f779cfd9a393d1eef2f9f /drivers/gpu/drm/amd/display/include/dpcd_defs.h | |
| parent | 5a2730fc1ff659977e4a8eda92d55769551041ac (diff) | |
drm/amd/display: Add DP 2.0 SST DC Support
1. Retrieve 128/132b link cap.
2. 128/132b link training and payload allocation.
3. UHBR10 link rate support.
[squash in warning fixes - Alex]
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/include/dpcd_defs.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/include/dpcd_defs.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/include/dpcd_defs.h b/drivers/gpu/drm/amd/display/include/dpcd_defs.h index aec7389aff37..6fb7c0145cb6 100644 --- a/drivers/gpu/drm/amd/display/include/dpcd_defs.h +++ b/drivers/gpu/drm/amd/display/include/dpcd_defs.h @@ -80,6 +80,15 @@ enum dpcd_phy_test_patterns { PHY_TEST_PATTERN_CP2520_1, PHY_TEST_PATTERN_CP2520_2, PHY_TEST_PATTERN_CP2520_3, /* same as TPS4 */ + PHY_TEST_PATTERN_128b_132b_TPS1 = 0x8, + PHY_TEST_PATTERN_128b_132b_TPS2 = 0x10, + PHY_TEST_PATTERN_PRBS9 = 0x18, + PHY_TEST_PATTERN_PRBS11 = 0x20, + PHY_TEST_PATTERN_PRBS15 = 0x28, + PHY_TEST_PATTERN_PRBS23 = 0x30, + PHY_TEST_PATTERN_PRBS31 = 0x38, + PHY_TEST_PATTERN_264BIT_CUSTOM = 0x40, + PHY_TEST_PATTERN_SQUARE_PULSE = 0x48, }; enum dpcd_test_dyn_range { @@ -135,7 +144,14 @@ enum dpcd_training_patterns { DPCD_TRAINING_PATTERN_1, DPCD_TRAINING_PATTERN_2, DPCD_TRAINING_PATTERN_3, +#if defined(CONFIG_DRM_AMD_DC_DCN) + DPCD_TRAINING_PATTERN_4 = 7, + DPCD_128b_132b_TPS1 = 1, + DPCD_128b_132b_TPS2 = 2, + DPCD_128b_132b_TPS2_CDS = 3, +#else DPCD_TRAINING_PATTERN_4 = 7 +#endif }; /* This enum is for use with PsrSinkPsrStatus.bits.sinkSelfRefreshStatus |