diff options
| author | Harmanprit Tatla <harmanprit.tatla@amd.com> | 2020-08-19 17:39:45 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-09-15 17:52:40 -0400 |
| commit | 958000cb24cc2db5f3ce1c70b9ad2b3e20b73581 (patch) | |
| tree | b120538416a8c83e372900ceaadadb61e8e62f69 /drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c | |
| parent | 498563cf9ca00dc4ee389cf2729dae81417a144f (diff) | |
drm/amd/display: Add CP_IRQ clear capability
[Why]
Currently we do not clear the CP_IRQ bit upon receiving it.
[How]
Added a function to clear CP_IRQ bit.
Signed-off-by: Harmanprit Tatla <harmanprit.tatla@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c index bb5130f4228d..9dd8c854fd81 100644 --- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c +++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c @@ -645,3 +645,22 @@ enum mod_hdcp_status mod_hdcp_write_content_type(struct mod_hdcp *hdcp) status = MOD_HDCP_STATUS_INVALID_OPERATION; return status; } + +enum mod_hdcp_status mod_hdcp_clear_cp_irq_status(struct mod_hdcp *hdcp) +{ + uint8_t clear_cp_irq_bit = 2; + uint32_t size = 1; + + if (is_dp_hdcp(hdcp)) { + if (hdcp->connection.link.dp.rev >= 0x14) + return hdcp->config.ddc.funcs.write_dpcd(hdcp->config.ddc.handle, + DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &clear_cp_irq_bit, size) + ? MOD_HDCP_STATUS_SUCCESS : MOD_HDCP_STATUS_DDC_FAILURE; + else + return hdcp->config.ddc.funcs.write_dpcd(hdcp->config.ddc.handle, + DP_DEVICE_SERVICE_IRQ_VECTOR, &clear_cp_irq_bit, size) + ? MOD_HDCP_STATUS_SUCCESS : MOD_HDCP_STATUS_DDC_FAILURE; + } + + return MOD_HDCP_STATUS_INVALID_OPERATION; +} |