diff options
| author | Xiaomeng Hou <Xiaomeng.Hou@amd.com> | 2021-01-25 15:59:14 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-02-09 15:29:28 -0500 |
| commit | ae07970a0621d67a8bc0dc5b44e3fc652bd2ba20 (patch) | |
| tree | 53a1887214d0479ce15d9a2b25e91f49d1d316f8 /drivers/gpu/drm/amd/pm/inc | |
| parent | 52d720b1a8003609d89950f721f431c7eea1ac0e (diff) | |
drm/amd/pm: add support for hwmon control of slow and fast PPT limit on vangogh
Implement hwmon API for reading/setting slow and fast PPT limit.
APU power is managed to system-level requirements through the PPT
(package power tracking) feature. PPT is intended to limit power to the
requirements of the power source and could be dynamically updated to
maximize APU performance within the system power budget.
Here FAST_PPT_LIMIT manages the ~10 ms moving average of APU power,
while SLOW_PPT_LIMIT manages the configurable, thermally significant
moving average of APU power (default ~5000 ms).
User could read slow/fast ppt limit using command "cat power*_cap" or
"sensors" in the hwmon device directory. User could adjust values of
slow/fast ppt limit as needed depending on workloads through command
"echo ## > power*_cap".
Example:
$ echo 15000000 > power1_cap
$ echo 18000000 > power2_cap
$ sensors
amdgpu-pci-0300
Adapter: PCI adapter
slowPPT: 9.04W (cap = 15.00 W)
fastPPT: 9.04W (cap = 18.00 W)
v2: align with existing interfaces for the getting/setting of PPT
limits. Encode the upper 8 bits of limit value to distinguish
slow and fast power limit type.
Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/inc')
| -rw-r--r-- | drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 9 |
2 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h index 82a5f4a4faf5..10b0624ade65 100644 --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h @@ -161,6 +161,12 @@ enum smu_power_src_type SMU_POWER_SOURCE_COUNT, }; +enum smu_ppt_limit_type +{ + SMU_DEFAULT_PPT_LIMIT = 0, + SMU_FAST_PPT_LIMIT, +}; + enum smu_ppt_limit_level { SMU_PPT_LIMIT_MIN = -1, @@ -709,6 +715,12 @@ struct pptable_funcs { int (*get_power_limit)(struct smu_context *smu); /** + * @get_ppt_limit: Get the device's ppt limits. + */ + int (*get_ppt_limit)(struct smu_context *smu, uint32_t *ppt_limit, + enum smu_ppt_limit_type limit_type, enum smu_ppt_limit_level limit_level); + + /** * @set_df_cstate: Set data fabric cstate. */ int (*set_df_cstate)(struct smu_context *smu, enum pp_df_cstate state); diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h index e49c2d08a983..d4cddd2390a2 100644 --- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h +++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h @@ -129,6 +129,15 @@ struct smu_11_0_power_context { enum smu_11_0_power_state power_state; }; +struct smu_11_5_power_context { + uint32_t power_source; + uint8_t in_power_limit_boost_mode; + enum smu_11_0_power_state power_state; + + uint32_t current_fast_ppt_limit; + uint32_t max_fast_ppt_limit; +}; + enum smu_v11_0_baco_seq { BACO_SEQ_BACO = 0, BACO_SEQ_MSR, |