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authorTimur Kristóf <timur.kristof@gmail.com>2025-08-28 17:11:08 +0200
committerAlex Deucher <alexander.deucher@amd.com>2025-09-02 15:55:34 -0400
commit9003a0746864f39a0ef72bd45f8e1ad85d930d67 (patch)
treef739a07f6ccc13e19bf9c04ee330b9aa8f848f16 /drivers/gpu/drm/amd/pm/legacy-dpm
parentce025130127437dc884c84c254170e27b2ce9309 (diff)
drm/amd/pm: Treat zero vblank time as too short in si_dpm (v3)
Some parts of the code base expect that MCLK switching is turned off when the vblank time is set to zero. According to pp_pm_compute_clocks the non-DC code has issues with MCLK switching with refresh rates over 120 Hz. v3: Add code comment to explain this better. Add an if statement instead of changing the switch_limit. Fixes: 841686df9f7d ("drm/amdgpu: add SI DPM support (v4)") Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/legacy-dpm')
-rw-r--r--drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index fb008c5980d6..c11c4cc111df 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -3085,7 +3085,13 @@ static bool si_dpm_vblank_too_short(void *handle)
/* we never hit the non-gddr5 limit so disable it */
u32 switch_limit = adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 0;
- if (vblank_time < switch_limit)
+ /* Consider zero vblank time too short and disable MCLK switching.
+ * Note that the vblank time is set to maximum when no displays are attached,
+ * so we'll still enable MCLK switching in that case.
+ */
+ if (vblank_time == 0)
+ return true;
+ else if (vblank_time < switch_limit)
return true;
else
return false;