diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-10-14 22:18:03 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-10-16 18:20:32 +0300 |
| commit | 4157c75604c7adc87e1a5ae94074621bfad5a3fe (patch) | |
| tree | 7e3932bdc30df07c897576cd948abd317f7a064a /drivers/gpu/drm/i915/display/intel_cdclk.h | |
| parent | 2b4c2a5e4d7b26b884f3861108becae0098e3233 (diff) | |
drm/i915/cdclk: Add intel_cdclk_min_cdclk_for_prefill()
Introduce a helper to compute the min required cdclk frequency
for a given guardband size. This could be used to bump up the
cdclk in case the vblank is so small that the normally computed
minimum cdclk results in too slow a prefill.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20251014191808.12326-5-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_cdclk.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_cdclk.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h index 8774a320670b..1c1140b53b17 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.h +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h @@ -72,5 +72,8 @@ void intel_cdclk_read_hw(struct intel_display *display); unsigned int intel_cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state); unsigned int intel_cdclk_prefill_adjustment_worst(const struct intel_crtc_state *crtc_state); +int intel_cdclk_min_cdclk_for_prefill(const struct intel_crtc_state *crtc_state, + unsigned int prefill_lines_unadjusted, + unsigned int prefill_lines_available); #endif /* __INTEL_CDCLK_H__ */ |