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authorVille Syrjälä <ville.syrjala@linux.intel.com>2025-10-13 23:12:34 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-10-17 00:05:04 +0300
commit7a8d9cfa6db0446246769ebb29b423ef4e6ed8eb (patch)
tree023927d6a8b2814b0c59b9d8f560c74a1761cb5c /drivers/gpu/drm/i915/display/intel_cdclk.h
parent5785ace8e1a07678ac914ed18803460db10bf87a (diff)
drm/i915: Compute per-crtc min_cdclk earlier
Currently we compute the min_cdclk for each pipe during intel_cdclk_atomic_check(). But that is too late for the pipe prefill vs. vblank length checks (done during intel_compute_global_watermarks). We can't just reorder these things due to other dependencies, so instead pull only the per-crtc minimum cdclk calculation ahead. We should have enough information for that as soon as we've computed the min cdclk for the planes. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20251013201236.30084-8-ville.syrjala@linux.intel.com Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_cdclk.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_cdclk.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index 6b4cbb6d817b..1ff7d078b42c 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -75,4 +75,6 @@ int intel_cdclk_min_cdclk_for_prefill(const struct intel_crtc_state *crtc_state,
unsigned int prefill_lines_unadjusted,
unsigned int prefill_lines_available);
+int intel_crtc_min_cdclk(const struct intel_crtc_state *crtc_state);
+
#endif /* __INTEL_CDCLK_H__ */