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authorLinus Walleij <linus.walleij@linaro.org>2020-08-09 00:31:22 +0200
committerLinus Walleij <linus.walleij@linaro.org>2020-08-13 16:39:26 +0200
commit42bac89a1730a32ed8415b745affc7de0be28e45 (patch)
tree6026cdeb07bfb9b93efe847b5180a06a292b34a4 /drivers/gpu/drm/mcde/mcde_display.c
parentc4842d4d0f744bf419a1b011fa3ce0ed98fcdc10 (diff)
drm/mcde: Enable the DSI link with display
The MCDE DSI link hardware which is modeled like a bridge in DRM, connected further to the panel bridge, creating a pipeline. We have been using the .pre_enable(), .enable(), .disable() and .post_disable() callbacks from the bridge to set this up in a chained manner: first the display controller goes online and then in successive order each bridge in the pipeline. Inside DRM it works like this: drm_atomic_helper_commit_tail() drm_atomic_helper_commit_modeset_enables() struct drm_crtc_helper_funcs .atomic_enable() struct drm_simple_display_pipe_funcs .enable() MCDE display enable call drm_atomic_bridge_chain_enable() struct drm_bridge_funcs .pre_enable() mcde_dsi_bridge_pre_enable() panel_bridge_pre_enable() struct drm_panel_funcs .prepare() struct drm_bridge_funcs .enable() mcde_dsi_bridge_enable() panel_bridge_enable() struct drm_panel_funcs .enable() A similar sequence is executed for disabling. Unfortunately this is not what the hardware needs: at a certain stage in the enablement of the display controller the DSI link needs to come up to support video mode, else something (like a FIFO flow) locks up the hardware and we never get picture. Fix this by simply leaving the pre|enable and post|disable callbacks unused, and establish two cross-calls from the display controller to bring up the DSI link at the right place in the display bring-up sequence and vice versa in the shutdown sequence. For command mode displays, it works just fine to also enable the display flow early. The only time we hold it back right now is in one-shot mode, on-demand display updates. When combined with the previous patch and some patches for the S6E63M0 display controller to support DSI mode, this gives working display on the Samsung GT-I8190 (Golden) phone. It has also been tested working on the Samsung GT-S7710 (Skomer) phone. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: newbytee@protonmail.com Cc: Stephan Gerhold <stephan@gerhold.net> Link: https://patchwork.freedesktop.org/patch/msgid/20200808223122.1492124-4-linus.walleij@linaro.org
Diffstat (limited to 'drivers/gpu/drm/mcde/mcde_display.c')
-rw-r--r--drivers/gpu/drm/mcde/mcde_display.c36
1 files changed, 28 insertions, 8 deletions
diff --git a/drivers/gpu/drm/mcde/mcde_display.c b/drivers/gpu/drm/mcde/mcde_display.c
index d608cc894e01..c271e5bf042e 100644
--- a/drivers/gpu/drm/mcde/mcde_display.c
+++ b/drivers/gpu/drm/mcde/mcde_display.c
@@ -999,6 +999,16 @@ static void mcde_display_enable(struct drm_simple_display_pipe *pipe,
mcde_configure_fifo(mcde, MCDE_FIFO_A, MCDE_DSI_FORMATTER_0,
fifo_wtrmrk);
+ /*
+ * This brings up the DSI bridge which is tightly connected
+ * to the MCDE DSI formatter.
+ *
+ * FIXME: if we want to use another formatter, such as DPI,
+ * we need to be more elaborate here and select the appropriate
+ * bridge.
+ */
+ mcde_dsi_enable(mcde->bridge);
+
/* Configure the DSI formatter 0 for the DSI panel output */
mcde_configure_dsi_formatter(mcde, MCDE_DSI_FORMATTER_0,
formatter_frame, pkt_size);
@@ -1025,16 +1035,20 @@ static void mcde_display_enable(struct drm_simple_display_pipe *pipe,
drm_crtc_vblank_on(crtc);
- if (mcde_flow_is_video(mcde)) {
- /*
- * Keep FIFO permanently enabled in video mode,
- * otherwise MCDE will stop feeding data to the panel.
- */
+ /*
+ * If we're using oneshot mode we don't start the flow
+ * until each time the display is given an update, and
+ * then we disable it immediately after. For all other
+ * modes (command or video) we start the FIFO flow
+ * right here. This is necessary for the hardware to
+ * behave right.
+ */
+ if (mcde->flow_mode != MCDE_COMMAND_ONESHOT_FLOW) {
mcde_enable_fifo(mcde, MCDE_FIFO_A);
dev_dbg(mcde->dev, "started MCDE video FIFO flow\n");
}
- /* Enable automatic clock gating */
+ /* Enable MCDE with automatic clock gating */
val = readl(mcde->regs + MCDE_CR);
val |= MCDE_CR_MCDEEN | MCDE_CR_AUTOCLKG_EN;
writel(val, mcde->regs + MCDE_CR);
@@ -1055,6 +1069,9 @@ static void mcde_display_disable(struct drm_simple_display_pipe *pipe)
/* Disable FIFO A flow */
mcde_disable_fifo(mcde, MCDE_FIFO_A, true);
+ /* This disables the DSI bridge */
+ mcde_dsi_disable(mcde->bridge);
+
event = crtc->state->event;
if (event) {
crtc->state->event = NULL;
@@ -1164,8 +1181,11 @@ static void mcde_display_update(struct drm_simple_display_pipe *pipe,
if (fb) {
mcde_set_extsrc(mcde, drm_fb_cma_get_gem_addr(fb, pstate, 0));
dev_info_once(mcde->dev, "first update of display contents\n");
- /* The flow is already active in video mode */
- if (!mcde_flow_is_video(mcde) && mcde->flow_active == 0)
+ /*
+ * Usually the flow is already active, unless we are in
+ * oneshot mode, then we need to kick the flow right here.
+ */
+ if (mcde->flow_active == 0)
mcde_start_flow(mcde);
} else {
/*