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authorMaxime Ripard <mripard@kernel.org>2025-08-27 17:12:42 +0200
committerTomi Valkeinen <tomi.valkeinen@ideasonboard.com>2025-09-01 10:37:19 +0300
commitb695ff1e7ad418b7525f76fa442f8511ec12f6d9 (patch)
tree0e4fa19b242a54290bd159062388612669de40f9 /drivers/gpu/drm/tidss
parentaeaef1ba6bba76eb256123505bbc01032bfd5caa (diff)
drm/tidss: dispc: Switch VP_REG_GET to using a mask
The VP_REG_GET function takes the start and end bits as parameter and will generate a mask out of them. This makes it difficult to share the masks between callers, since we now need two arguments and to keep them consistent. Let's change VP_REG_GET to take the mask as an argument instead, and let the caller create the mask. Eventually, this mask will be moved to a define. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-11-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Diffstat (limited to 'drivers/gpu/drm/tidss')
-rw-r--r--drivers/gpu/drm/tidss/tidss_dispc.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index 27ac57d77032..3d807b129c09 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -619,9 +619,8 @@ void tidss_disable_oldi(struct tidss_device *tidss, u32 hw_videoport)
dispc_vid_write(_dispc, _hw_plane, _idx, _reg); \
})
-#define VP_REG_GET(dispc, vp, idx, start, end) \
- ((u32)FIELD_GET(GENMASK((start), (end)), \
- dispc_vp_read((dispc), (vp), (idx))))
+#define VP_REG_GET(dispc, vp, idx, mask) \
+ ((u32)FIELD_GET((mask), dispc_vp_read((dispc), (vp), (idx))))
#define VP_REG_FLD_MOD(dispc, vp, idx, val, start, end) \
({ \
@@ -1260,12 +1259,13 @@ void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport)
bool dispc_vp_go_busy(struct dispc_device *dispc, u32 hw_videoport)
{
- return VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5);
+ return VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL,
+ GENMASK(5, 5));
}
void dispc_vp_go(struct dispc_device *dispc, u32 hw_videoport)
{
- WARN_ON(VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5));
+ WARN_ON(VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, GENMASK(5, 5)));
VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 5, 5);
}