Merge tag 'drm-next-2021-04-30' of git://anongit.freedesktop.org/drm/drm

Pull more drm updates from Dave Airlie:
 "Looks like I missed a tegra feature request for next, but should still
  be fine since it's pretty self contained.

  Apart from that got a set of i915 and amdgpu fixes as per usual along
  with a few misc fixes.

  tegra:
   - Tegra186 hardware cursor support
   - better capability reporting for different SoC
   - better framebuffer modifier support
   - host1x fixes

  ttm:
   - fix unswappable BO handling

  efifb:
   - check for PCI before using it

  amdgpu:
   - Fixes for Aldebaran
   - Display LTTPR fixes
   - eDP fixes
   - Fixes for Vangogh
   - RAS fixes
   - ASPM support
   - Renoir SMU fixes
   - Modifier fixes
   - Misc code cleanups
   - Freesync fixes

  i915:
   - Several fixes to GLK handling in recent display refactoring
   - Rare watchdog timer race fix
   - Cppcheck redundant condition fix
   - Overlay error code propagation fix
   - Documentation fix
   - gvt: Remove one unused function warning
   - gvt: Fix intel_gvt_init_device() return type
   - gvt: Remove one duplicated register accessible check"

* tag 'drm-next-2021-04-30' of git://anongit.freedesktop.org/drm/drm: (111 commits)
  efifb: Check efifb_pci_dev before using it
  drm/i915: Fix docbook descriptions for i915_gem_shrinker
  drm/i915: fix an error code in intel_overlay_do_put_image()
  drm/i915/display/psr: Fix cppcheck warnings
  drm/i915: Disable LTTPR detection on GLK once again
  drm/i915: Restore lost glk ccs w/a
  drm/i915: Restore lost glk FBC 16bpp w/a
  drm/i915: Take request reference before arming the watchdog timer
  drm/ttm: fix error handling if no BO can be swapped out v4
  drm/i915/gvt: Remove duplicated register accessible check
  drm/amdgpu/gmc9: remove dummy read workaround for newer chips
  drm/amdgpu: Add mem sync flag for IB allocated by SA
  drm/amdgpu: Fix SDMA RAS error reporting on Aldebaran
  drm/amdgpu: Reset RAS error count and status regs
  Revert "drm/amdgpu: workaround the TMR MC address issue (v2)"
  drm/amd/display: 3.2.132
  drm/amd/display: [FW Promotion] Release 0.0.62
  drm/amd/display: add helper for enabling mst stream features
  drm/amd/display: Report Proper Quantization Range in AVI Infoframe
  drm/amd/display: Fix call to pass bpp in 16ths of a bit
  ...

1 files changed, 20 insertions, 8 deletions

diff --git a/drivers/gpu/host1x/intr.c b/drivers/gpu/host1x/intr.c
index 9245add23b5d..6d1f3c0fdbe7 100644
--- a/drivers/gpu/host1x/intr.c
+++ b/drivers/gpu/host1x/intr.c
@@ -235,25 +235,37 @@ int host1x_intr_add_action(struct host1x *host, struct host1x_syncpt *syncpt,
 			host1x_hw_intr_enable_syncpt_intr(host, syncpt->id);
 	}
 
-	spin_unlock(&syncpt->intr.lock);
-
 	if (ref)
 		*ref = waiter;
+
+	spin_unlock(&syncpt->intr.lock);
+
 	return 0;
 }
 
-void host1x_intr_put_ref(struct host1x *host, unsigned int id, void *ref)
+void host1x_intr_put_ref(struct host1x *host, unsigned int id, void *ref,
+			 bool flush)
 {
 	struct host1x_waitlist *waiter = ref;
 	struct host1x_syncpt *syncpt;
 
-	while (atomic_cmpxchg(&waiter->state, WLS_PENDING, WLS_CANCELLED) ==
-	       WLS_REMOVED)
-		schedule();
+	atomic_cmpxchg(&waiter->state, WLS_PENDING, WLS_CANCELLED);
 
 	syncpt = host->syncpt + id;
-	(void)process_wait_list(host, syncpt,
-				host1x_syncpt_load(host->syncpt + id));
+
+	spin_lock(&syncpt->intr.lock);
+	if (atomic_cmpxchg(&waiter->state, WLS_CANCELLED, WLS_HANDLED) ==
+	    WLS_CANCELLED) {
+		list_del(&waiter->list);
+		kref_put(&waiter->refcount, waiter_release);
+	}
+	spin_unlock(&syncpt->intr.lock);
+
+	if (flush) {
+		/* Wait until any concurrently executing handler has finished. */
+		while (atomic_read(&waiter->state) != WLS_HANDLED)
+			schedule();
+	}
 
 	kref_put(&waiter->refcount, waiter_release);
 }