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authorAlistair Popple <apopple@nvidia.com>2025-11-10 22:34:18 +0900
committerAlexandre Courbot <acourbot@nvidia.com>2025-11-14 20:25:57 +0900
commit4fd4acd973ec6c734e928d19aaa649d4268303a1 (patch)
treee0568b91a7564d4ad64cb0cc15331a29986d3ea3 /drivers/gpu/nova-core/gsp/cmdq.rs
parent75f6b1de8133ea337b72901464989dc811d3305d (diff)
gpu: nova-core: gsp: Create rmargs
Initialise the GSP resource manager arguments (rmargs) which provides initialisation parameters to the GSP firmware during boot. The rmargs structure contains arguments to configure the GSP message/command queue location. These are mapped for coherent DMA and added to the libos data structure for access when booting GSP. Signed-off-by: Alistair Popple <apopple@nvidia.com> Co-developed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Message-ID: <20251110-gsp_boot-v9-10-8ae4058e3c0e@nvidia.com>
Diffstat (limited to 'drivers/gpu/nova-core/gsp/cmdq.rs')
-rw-r--r--drivers/gpu/nova-core/gsp/cmdq.rs27
1 files changed, 26 insertions, 1 deletions
diff --git a/drivers/gpu/nova-core/gsp/cmdq.rs b/drivers/gpu/nova-core/gsp/cmdq.rs
index c00d9fa9b79b..295903c28922 100644
--- a/drivers/gpu/nova-core/gsp/cmdq.rs
+++ b/drivers/gpu/nova-core/gsp/cmdq.rs
@@ -11,7 +11,10 @@ use core::{
use kernel::{
device,
- dma::CoherentAllocation,
+ dma::{
+ CoherentAllocation,
+ DmaAddress, //
+ },
dma_write,
io::poll::read_poll_timeout,
prelude::*,
@@ -33,6 +36,7 @@ use crate::{
MsgqTxHeader, //
},
PteArray,
+ GSP_PAGE_SHIFT,
GSP_PAGE_SIZE, //
},
num,
@@ -429,6 +433,22 @@ pub(crate) struct Cmdq {
}
impl Cmdq {
+ /// Offset of the data after the PTEs.
+ const POST_PTE_OFFSET: usize = core::mem::offset_of!(GspMem, cpuq);
+
+ /// Offset of command queue ring buffer.
+ pub(crate) const CMDQ_OFFSET: usize = core::mem::offset_of!(GspMem, cpuq)
+ + core::mem::offset_of!(Msgq, msgq)
+ - Self::POST_PTE_OFFSET;
+
+ /// Offset of message queue ring buffer.
+ pub(crate) const STATQ_OFFSET: usize = core::mem::offset_of!(GspMem, gspq)
+ + core::mem::offset_of!(Msgq, msgq)
+ - Self::POST_PTE_OFFSET;
+
+ /// Number of page table entries for the GSP shared region.
+ pub(crate) const NUM_PTES: usize = size_of::<GspMem>() >> GSP_PAGE_SHIFT;
+
/// Creates a new command queue for `dev`.
pub(crate) fn new(dev: &device::Device<device::Bound>) -> Result<Cmdq> {
let gsp_mem = DmaGspMem::new(dev)?;
@@ -653,4 +673,9 @@ impl Cmdq {
result
}
+
+ /// Returns the DMA handle of the command queue's shared memory region.
+ pub(crate) fn dma_handle(&self) -> DmaAddress {
+ self.gsp_mem.0.dma_handle()
+ }
}