diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-05-12 13:33:58 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-05-16 11:31:11 +0300 |
| commit | d65c47f976cc4c01ec1b4f9f113606f44f384de9 (patch) | |
| tree | 21fe6839a968daf1d97a85bd8fc2db9441a9b0a0 /drivers/gpu | |
| parent | d9dd810dd404ecb7bdfd3294bfb8d932e6066e05 (diff) | |
drm/i915/dmc: Introduce dmc_configure_event()
Instead of hardcoding the event handler indices (for runtime
event handler enable/disable) we can simply look for the handler
with the appropriate event type. This isolates us from the firmware
details a bit better.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250512103358.15724-8-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dmc.c | 39 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 |
2 files changed, 27 insertions, 18 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 9ab3ac3c1658..a7ba17361d63 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -576,6 +576,31 @@ static bool is_event_handler(struct intel_display *display, REG_FIELD_GET(DMC_EVT_CTL_EVENT_ID_MASK, data) == event_id; } +static void dmc_configure_event(struct intel_display *display, + enum intel_dmc_id dmc_id, + unsigned int event_id, + bool enable) +{ + struct intel_dmc *dmc = display_to_dmc(display); + int num_handlers = 0; + int i; + + for (i = 0; i < dmc->dmc_info[dmc_id].mmio_count; i++) { + i915_reg_t reg = dmc->dmc_info[dmc_id].mmioaddr[i]; + u32 data = dmc->dmc_info[dmc_id].mmiodata[i]; + + if (!is_event_handler(display, dmc_id, event_id, reg, data)) + continue; + + intel_de_write(display, reg, enable ? data : dmc_evt_ctl_disable()); + num_handlers++; + } + + drm_WARN_ONCE(display->drm, num_handlers != 1, + "DMC %d has %d handlers for event 0x%x\n", + dmc_id, num_handlers, event_id); +} + /** * intel_dmc_block_pkgc() - block PKG C-state * @display: display instance @@ -606,19 +631,9 @@ void intel_dmc_block_pkgc(struct intel_display *display, enum pipe pipe, void intel_dmc_start_pkgc_exit_at_start_of_undelayed_vblank(struct intel_display *display, enum pipe pipe, bool enable) { - u32 val; - - if (enable) - val = DMC_EVT_CTL_ENABLE | DMC_EVT_CTL_RECURRING | - REG_FIELD_PREP(DMC_EVT_CTL_TYPE_MASK, - DMC_EVT_CTL_TYPE_EDGE_0_1) | - REG_FIELD_PREP(DMC_EVT_CTL_EVENT_ID_MASK, - PIPEDMC_EVENT_VBLANK); - else - val = dmc_evt_ctl_disable(); + enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe); - intel_de_write(display, MTL_PIPEDMC_EVT_CTL_4(pipe), - val); + dmc_configure_event(display, dmc_id, PIPEDMC_EVENT_VBLANK, enable); } static bool disable_dmc_evt(struct intel_display *display, diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h index edd4e69319b9..d8e715677454 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h +++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h @@ -287,12 +287,6 @@ enum pipedmc_event_id { #define MTL_PIPEDMC_CONTROL _MMIO(0x45250) #define PIPEDMC_ENABLE_MTL(pipe) REG_BIT(((pipe) - PIPE_A) * 4) -#define _MTL_PIPEDMC_EVT_CTL_4_A 0x5f044 -#define _MTL_PIPEDMC_EVT_CTL_4_B 0x5f444 -#define MTL_PIPEDMC_EVT_CTL_4(pipe) _MMIO_PIPE(pipe, \ - _MTL_PIPEDMC_EVT_CTL_4_A, \ - _MTL_PIPEDMC_EVT_CTL_4_B) - #define _PIPEDMC_STATUS_A 0x5f06c #define _PIPEDMC_STATUS_B 0x5f46c #define PIPEDMC_STATUS(pipe) _MMIO_PIPE((pipe), _PIPEDMC_STATUS_A, _PIPEDMC_STATUS_B) |