diff options
| author | akpm <akpm@linux-foundation.org> | 2022-06-27 10:31:34 -0700 |
|---|---|---|
| committer | akpm <akpm@linux-foundation.org> | 2022-06-27 10:31:34 -0700 |
| commit | 46a3b1125308f8f90a065eeecfafd2a96b01a36c (patch) | |
| tree | 6e080118fbad5aa217d160cedf02f10108ce3bf2 /drivers/net/ethernet/intel/ice/ice_ptp.h | |
| parent | 6edda04ccc7cfb281d139e352dbd5dd933bd2751 (diff) | |
| parent | 03c765b0e3b4cb5063276b086c76f7a612856a9a (diff) | |
Merge branch 'master' into mm-stable
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_ptp.h')
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_ptp.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h index afd048d69959..10e396abf130 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp.h @@ -49,6 +49,37 @@ struct ice_perout_channel { * To allow multiple ports to access the shared register block independently, * the blocks are split up so that indexes are assigned to each port based on * hardware logical port number. + * + * The timestamp blocks are handled differently for E810- and E822-based + * devices. In E810 devices, each port has its own block of timestamps, while in + * E822 there is a need to logically break the block of registers into smaller + * chunks based on the port number to avoid collisions. + * + * Example for port 5 in E810: + * +--------+--------+--------+--------+--------+--------+--------+--------+ + * |register|register|register|register|register|register|register|register| + * | block | block | block | block | block | block | block | block | + * | for | for | for | for | for | for | for | for | + * | port 0 | port 1 | port 2 | port 3 | port 4 | port 5 | port 6 | port 7 | + * +--------+--------+--------+--------+--------+--------+--------+--------+ + * ^^ + * || + * |--- quad offset is always 0 + * ---- quad number + * + * Example for port 5 in E822: + * +-----------------------------+-----------------------------+ + * | register block for quad 0 | register block for quad 1 | + * |+------+------+------+------+|+------+------+------+------+| + * ||port 0|port 1|port 2|port 3|||port 0|port 1|port 2|port 3|| + * |+------+------+------+------+|+------+------+------+------+| + * +-----------------------------+-------^---------------------+ + * ^ | + * | --- quad offset* + * ---- quad number + * + * * PHY port 5 is port 1 in quad 1 + * */ /** |