diff options
| author | Miguel Ojeda <ojeda@kernel.org> | 2025-10-29 19:25:02 +0100 |
|---|---|---|
| committer | Uwe Kleine-König <ukleinek@kernel.org> | 2025-11-13 10:21:01 +0100 |
| commit | 6fe9e919c144f1296d38e2abb10c7ac4320aa7fa (patch) | |
| tree | 30f287ea45a5a32e3f91d8f0ed9943897d038aa0 /drivers/pwm/pwm_th1520.rs | |
| parent | a367b64ba498a7eac34af3a67ce59317066b2779 (diff) | |
pwm: Fix Rust formatting
We do our best to keep the repository `rustfmt`-clean [1], thus run the
tool to fix the formatting issue.
A trailing empty comment [2] is added in order to preserve the wanted
style for imports (otherwise the tool will compact the first two items).
Link: https://rust-for-linux.com/contributing#submit-checklist-addendum [1]
Link: https://docs.kernel.org/rust/coding-guidelines.html#style-formatting [2]
Fixes: d8046cd50879 ("rust: pwm: Add complete abstraction layer")
Fixes: 7b3dce814a15 ("rust: pwm: Add Kconfig and basic data structures")
Fixes: e03724aac758 ("pwm: Add Rust driver for T-HEAD TH1520 SoC")
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
Link: https://patch.msgid.link/20251029182502.783392-1-ojeda@kernel.org
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
Diffstat (limited to 'drivers/pwm/pwm_th1520.rs')
| -rw-r--r-- | drivers/pwm/pwm_th1520.rs | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/pwm/pwm_th1520.rs b/drivers/pwm/pwm_th1520.rs index 0ad38b78be85..ee2a6d573bc2 100644 --- a/drivers/pwm/pwm_th1520.rs +++ b/drivers/pwm/pwm_th1520.rs @@ -200,7 +200,10 @@ impl pwm::PwmOps for Th1520PwmDriverData { let rate_hz = data.clk.rate().as_hz() as u64; if wfhw.period_cycles == 0 { - dev_dbg!(chip.device(), "HW state has zero period, reporting as disabled.\n"); + dev_dbg!( + chip.device(), + "HW state has zero period, reporting as disabled.\n" + ); *wf = pwm::Waveform::default(); return Ok(()); } @@ -277,7 +280,10 @@ impl pwm::PwmOps for Th1520PwmDriverData { if was_enabled { iomap.try_write32(wfhw.ctrl_val, th1520_pwm_ctrl(hwpwm))?; iomap.try_write32(0, th1520_pwm_fp(hwpwm))?; - iomap.try_write32(wfhw.ctrl_val | TH1520_PWM_CFG_UPDATE, th1520_pwm_ctrl(hwpwm))?; + iomap.try_write32( + wfhw.ctrl_val | TH1520_PWM_CFG_UPDATE, + th1520_pwm_ctrl(hwpwm), + )?; } return Ok(()); } @@ -285,7 +291,10 @@ impl pwm::PwmOps for Th1520PwmDriverData { iomap.try_write32(wfhw.ctrl_val, th1520_pwm_ctrl(hwpwm))?; iomap.try_write32(wfhw.period_cycles, th1520_pwm_per(hwpwm))?; iomap.try_write32(wfhw.duty_cycles, th1520_pwm_fp(hwpwm))?; - iomap.try_write32(wfhw.ctrl_val | TH1520_PWM_CFG_UPDATE, th1520_pwm_ctrl(hwpwm))?; + iomap.try_write32( + wfhw.ctrl_val | TH1520_PWM_CFG_UPDATE, + th1520_pwm_ctrl(hwpwm), + )?; // The `TH1520_PWM_START` bit must be written in a separate, final transaction, and // only when enabling the channel from a disabled state. |