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authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>2025-01-28 04:13:39 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2025-02-20 17:38:33 +0100
commit0704de89eee60e2f968973c7b4ccd8cd219b2d97 (patch)
tree8af5c8fa09fb45ad8549e18f0b581d1ffb04e17c /drivers/soc/renesas/r9a08g045-sysc.c
parentc1aca5588279fc341a2e12d61e853bb1fd4c72d5 (diff)
soc: renesas: rz-sysc: Move RZ/G3S SoC detection to the SYSC driver
Now that we have SoC detection in the RZ SYSC driver, move the RZ/G3S SoC detection to it. The SYSC provides SoC ID in its own registers. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Link: https://lore.kernel.org/20250128031342.52675-3-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/soc/renesas/r9a08g045-sysc.c')
-rw-r--r--drivers/soc/renesas/r9a08g045-sysc.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/soc/renesas/r9a08g045-sysc.c b/drivers/soc/renesas/r9a08g045-sysc.c
new file mode 100644
index 000000000000..f4db1431e036
--- /dev/null
+++ b/drivers/soc/renesas/r9a08g045-sysc.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * RZ/G3S System controller driver
+ *
+ * Copyright (C) 2024 Renesas Electronics Corp.
+ */
+
+#include <linux/bits.h>
+#include <linux/init.h>
+
+#include "rz-sysc.h"
+
+static const struct rz_sysc_soc_id_init_data rzg3s_sysc_soc_id_init_data __initconst = {
+ .family = "RZ/G3S",
+ .id = 0x85e0447,
+ .devid_offset = 0xa04,
+ .revision_mask = GENMASK(31, 28),
+ .specific_id_mask = GENMASK(27, 0),
+};
+
+const struct rz_sysc_init_data rzg3s_sysc_init_data __initconst = {
+ .soc_id_init_data = &rzg3s_sysc_soc_id_init_data,
+};