diff options
| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2025-10-17 13:42:34 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-10-23 16:03:30 +0200 |
| commit | 4765d59fcf8679372286bc899628c3721dafe456 (patch) | |
| tree | cb41aa1a6fc05438c73b606a5f59d9caf58ee403 /drivers/soc/renesas/rcar-rst.c | |
| parent | 3a8660878839faadb4f1a6dd72c3179c1df56787 (diff) | |
soc: renesas: rcar-rst: Keep RESBAR2S in default state
Unlike Gen2, Gen4 has bit 15 of WDTRSTCR register also used. Keep it in
the default state for the V3U firmware workaround.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251017114234.2968-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/soc/renesas/rcar-rst.c')
| -rw-r--r-- | drivers/soc/renesas/rcar-rst.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c index 7ba02f3a4a4f..0541990901fc 100644 --- a/drivers/soc/renesas/rcar-rst.c +++ b/drivers/soc/renesas/rcar-rst.c @@ -12,6 +12,7 @@ #define WDTRSTCR_RESET 0xA55A0002 #define WDTRSTCR 0x0054 +#define GEN4_WDTRSTCR_RESET 0xA55A8002 #define GEN4_WDTRSTCR 0x0010 #define CR7BAR 0x0070 @@ -30,7 +31,7 @@ static int rcar_rst_enable_wdt_reset(void __iomem *base) static int rcar_rst_v3u_enable_wdt_reset(void __iomem *base) { - iowrite32(WDTRSTCR_RESET, base + GEN4_WDTRSTCR); + iowrite32(GEN4_WDTRSTCR_RESET, base + GEN4_WDTRSTCR); return 0; } |