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authorLinus Torvalds <torvalds@linux-foundation.org>2025-12-05 17:29:04 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2025-12-05 17:29:04 -0800
commit208eed95fc710827b100266c9450ae84d46727bd (patch)
tree9ae20a051b03bcd4ad677bb0f9dffba8c9699336 /drivers/soc/rockchip/grf.c
parent66a1025f7f0bc00404ec6357af68815c70dadae2 (diff)
parent4b1e81570144f03521482f7659fee060d8f63481 (diff)
Merge tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann: "This is the first half of the driver changes: - A treewide interface change to the "syscore" operations for power management, as a preparation for future Tegra specific changes - Reset controller updates with added drivers for LAN969x, eic770 and RZ/G3S SoCs - Protection of system controller registers on Renesas and Google SoCs, to prevent trivially triggering a system crash from e.g. debugfs access - soc_device identification updates on Nvidia, Exynos and Mediatek - debugfs support in the ST STM32 firewall driver - Minor updates for SoC drivers on AMD/Xilinx, Renesas, Allwinner, TI - Cleanups for memory controller support on Nvidia and Renesas" * tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (114 commits) memory: tegra186-emc: Fix missing put_bpmp Documentation: reset: Remove reset_controller_add_lookup() reset: fix BIT macro reference reset: rzg2l-usbphy-ctrl: Fix a NULL vs IS_ERR() bug in probe reset: th1520: Support reset controllers in more subsystems reset: th1520: Prepare for supporting multiple controllers dt-bindings: reset: thead,th1520-reset: Add controllers for more subsys dt-bindings: reset: thead,th1520-reset: Remove non-VO-subsystem resets reset: remove legacy reset lookup code clk: davinci: psc: drop unused reset lookup reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC reset: rzg2l-usbphy-ctrl: Add support for USB PWRRDY dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support reset: eswin: Add eic7700 reset driver dt-bindings: reset: eswin: Documentation for eic7700 SoC reset: sparx5: add LAN969x support dt-bindings: reset: microchip: Add LAN969x support soc: rockchip: grf: Add select correct PWM implementation on RK3368 soc/tegra: pmc: Add USB wake events for Tegra234 amba: tegra-ahb: Fix device leak on SMMU enable ...
Diffstat (limited to 'drivers/soc/rockchip/grf.c')
-rw-r--r--drivers/soc/rockchip/grf.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
index 344870da7675..27bfa09ff251 100644
--- a/drivers/soc/rockchip/grf.c
+++ b/drivers/soc/rockchip/grf.c
@@ -91,6 +91,7 @@ static const struct rockchip_grf_info rk3328_grf __initconst = {
static const struct rockchip_grf_value rk3368_defaults[] __initconst = {
{ "jtag switching", RK3368_GRF_SOC_CON15, FIELD_PREP_WM16_CONST(BIT(13), 0) },
+ { "pwm select", RK3368_GRF_SOC_CON15, FIELD_PREP_WM16_CONST(BIT(12), 1) },
};
static const struct rockchip_grf_info rk3368_grf __initconst = {
@@ -98,6 +99,17 @@ static const struct rockchip_grf_info rk3368_grf __initconst = {
.num_values = ARRAY_SIZE(rk3368_defaults),
};
+#define RK3368_PMUGRF_SOC_CON0 0x100
+
+static const struct rockchip_grf_value rk3368_pmugrf_defaults[] __initconst = {
+ { "pwm2 select", RK3368_PMUGRF_SOC_CON0, FIELD_PREP_WM16_CONST(BIT(7), 0) },
+};
+
+static const struct rockchip_grf_info rk3368_pmugrf __initconst = {
+ .values = rk3368_pmugrf_defaults,
+ .num_values = ARRAY_SIZE(rk3368_pmugrf_defaults),
+};
+
#define RK3399_GRF_SOC_CON7 0xe21c
static const struct rockchip_grf_value rk3399_defaults[] __initconst = {
@@ -176,6 +188,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
.compatible = "rockchip,rk3368-grf",
.data = (void *)&rk3368_grf,
}, {
+ .compatible = "rockchip,rk3368-pmugrf",
+ .data = (void *)&rk3368_pmugrf,
+ }, {
.compatible = "rockchip,rk3399-grf",
.data = (void *)&rk3399_grf,
}, {