summaryrefslogtreecommitdiff
path: root/drivers/spi/spi-sh-msiof.c
diff options
context:
space:
mode:
authorGeert Uytterhoeven <geert+renesas@glider.be>2025-05-16 15:32:18 +0200
committerMark Brown <broonie@kernel.org>2025-05-19 11:55:32 +0100
commit1ab2c8c45f5c5df6707cc848686e674f4ec5c3d9 (patch)
treea46aedd992057f466623c7e06737ce4ac57b23eb /drivers/spi/spi-sh-msiof.c
parent955f7ce6680564963765e5fc1c3e71027a39a806 (diff)
spi: sh-msiof: Correct RX FIFO size for R-Car Gen2
According to Renesas Technical Updates TN-RCS-S068A/E, the MSIOF receive FIFOs on R-Car Gen2 SoCs have room for 128 words of 32 bits. Note that this change has no actual impact on the behavior of the driver, as SPI_CONTROLLER_MUST_TX is set, and transfer size is currenty limited to the minimum of the transmit and receive FIFO sizes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/fd11933f932df81d84f417a21e2179bd4fdcfdc1.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-sh-msiof.c')
-rw-r--r--drivers/spi/spi-sh-msiof.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
index ea9277ab87f6..8d18a26128d6 100644
--- a/drivers/spi/spi-sh-msiof.c
+++ b/drivers/spi/spi-sh-msiof.c
@@ -1099,7 +1099,7 @@ static const struct sh_msiof_chipdata rcar_gen2_data = {
.bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
SPI_BPW_MASK(24) | SPI_BPW_MASK(32),
.tx_fifo_size = 64,
- .rx_fifo_size = 64,
+ .rx_fifo_size = 128,
.ctlr_flags = SPI_CONTROLLER_MUST_TX,
.min_div_pow = 0,
};