diff options
| author | Joel Fernandes <joelagnelf@nvidia.com> | 2025-11-14 14:55:44 -0500 |
|---|---|---|
| committer | Alexandre Courbot <acourbot@nvidia.com> | 2025-11-15 20:08:49 +0900 |
| commit | f77be04d00d8ce403ecaf547f1515a844bbde060 (patch) | |
| tree | e83929c3d2a3928b9539b6a65460c896ff7acd4c /drivers | |
| parent | 0f2c8e278e9c6219c080d1e016cd72b07d50e444 (diff) | |
gpu: nova-core: gsp: Add support for checking if GSP reloaded
During the sequencer process, we need to check if GSP was successfully
reloaded. Add functionality to check for the same.
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251114195552.739371-6-joelagnelf@nvidia.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/nova-core/falcon/gsp.rs | 18 | ||||
| -rw-r--r-- | drivers/gpu/nova-core/regs.rs | 6 |
2 files changed, 24 insertions, 0 deletions
diff --git a/drivers/gpu/nova-core/falcon/gsp.rs b/drivers/gpu/nova-core/falcon/gsp.rs index 93d4eca65631..9ef1fbae141f 100644 --- a/drivers/gpu/nova-core/falcon/gsp.rs +++ b/drivers/gpu/nova-core/falcon/gsp.rs @@ -1,5 +1,11 @@ // SPDX-License-Identifier: GPL-2.0 +use kernel::{ + io::poll::read_poll_timeout, + prelude::*, + time::Delta, // +}; + use crate::{ driver::Bar0, falcon::{ @@ -37,4 +43,16 @@ impl Falcon<Gsp> { .set_swgen0(true) .write(bar, &Gsp::ID); } + + /// Checks if GSP reload/resume has completed during the boot process. + #[expect(dead_code)] + pub(crate) fn check_reload_completed(&self, bar: &Bar0, timeout: Delta) -> Result<bool> { + read_poll_timeout( + || Ok(regs::NV_PGC6_BSI_SECURE_SCRATCH_14::read(bar)), + |val| val.boot_stage_3_handoff(), + Delta::ZERO, + timeout, + ) + .map(|_| true) + } } diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs index 274e53a1a44d..b32c07092f93 100644 --- a/drivers/gpu/nova-core/regs.rs +++ b/drivers/gpu/nova-core/regs.rs @@ -138,6 +138,12 @@ impl NV_PFB_PRI_MMU_WPR2_ADDR_HI { // These scratch registers remain powered on even in a low-power state and have a designated group // number. +// Boot Sequence Interface (BSI) register used to determine +// if GSP reload/resume has completed during the boot process. +register!(NV_PGC6_BSI_SECURE_SCRATCH_14 @ 0x001180f8 { + 26:26 boot_stage_3_handoff as bool; +}); + // Privilege level mask register. It dictates whether the host CPU has privilege to access the // `PGC6_AON_SECURE_SCRATCH_GROUP_05` register (which it needs to read GFW_BOOT). register!(NV_PGC6_AON_SECURE_SCRATCH_GROUP_05_PRIV_LEVEL_MASK @ 0x00118128, |