diff options
| -rw-r--r-- | drivers/gpu/nova-core/fb/hal/tu102.rs | 16 | ||||
| -rw-r--r-- | drivers/gpu/nova-core/firmware/fwsec.rs | 8 |
2 files changed, 11 insertions, 13 deletions
diff --git a/drivers/gpu/nova-core/fb/hal/tu102.rs b/drivers/gpu/nova-core/fb/hal/tu102.rs index b022c781caf4..32114c3b3686 100644 --- a/drivers/gpu/nova-core/fb/hal/tu102.rs +++ b/drivers/gpu/nova-core/fb/hal/tu102.rs @@ -15,15 +15,13 @@ pub(super) fn read_sysmem_flush_page_gm107(bar: &Bar0) -> u64 { pub(super) fn write_sysmem_flush_page_gm107(bar: &Bar0, addr: u64) -> Result { // Check that the address doesn't overflow the receiving 32-bit register. - if addr >> (u32::BITS + FLUSH_SYSMEM_ADDR_SHIFT) == 0 { - regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::default() - .set_adr_39_08((addr >> FLUSH_SYSMEM_ADDR_SHIFT) as u32) - .write(bar); - - Ok(()) - } else { - Err(EINVAL) - } + u32::try_from(addr >> FLUSH_SYSMEM_ADDR_SHIFT) + .map_err(|_| EINVAL) + .map(|addr| { + regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::default() + .set_adr_39_08(addr) + .write(bar) + }) } pub(super) fn display_enabled_gm107(bar: &Bar0) -> bool { diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-core/firmware/fwsec.rs index dd3420aaa2bf..ce78c1563754 100644 --- a/drivers/gpu/nova-core/firmware/fwsec.rs +++ b/drivers/gpu/nova-core/firmware/fwsec.rs @@ -291,7 +291,7 @@ impl FirmwareDmaObject<FwsecFirmware, Unsigned> { frts_cmd.read_vbios = ReadVbios { ver: 1, - hdr: size_of::<ReadVbios>() as u32, + hdr: u32::try_from(size_of::<ReadVbios>())?, addr: 0, size: 0, flags: 2, @@ -304,9 +304,9 @@ impl FirmwareDmaObject<FwsecFirmware, Unsigned> { } => { frts_cmd.frts_region = FrtsRegion { ver: 1, - hdr: size_of::<FrtsRegion>() as u32, - addr: (frts_addr >> 12) as u32, - size: (frts_size >> 12) as u32, + hdr: u32::try_from(size_of::<FrtsRegion>())?, + addr: u32::try_from(frts_addr >> 12)?, + size: u32::try_from(frts_size >> 12)?, ftype: NVFW_FRTS_CMD_REGION_TYPE_FB, }; |