diff options
Diffstat (limited to 'arch/arm64/boot/dts/sprd/whale2.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/sprd/whale2.dtsi | 54 |
1 files changed, 36 insertions, 18 deletions
diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi index a551e14ce826..2ecaa56001b8 100644 --- a/arch/arm64/boot/dts/sprd/whale2.dtsi +++ b/arch/arm64/boot/dts/sprd/whale2.dtsi @@ -18,49 +18,67 @@ #size-cells = <2>; ranges; - ap_ahb_regs: syscon@20210000 { - compatible = "syscon"; + apahb_gate: clock-controller@20210000 { reg = <0 0x20210000 0 0x10000>; + compatible = "sprd,sc9860-apahb-gate"; + clocks = <&aon_prediv 0>; + #clock-cells = <1>; }; - pmu_regs: syscon@402b0000 { - compatible = "syscon"; + pmu_gate: clock-controller@402b0000 { reg = <0 0x402b0000 0 0x10000>; + compatible = "sprd,sc9860-pmu-gate"; + clocks = <&ext_26m>; + #clock-cells = <1>; }; - aon_regs: syscon@402e0000 { - compatible = "syscon"; + aon_gate: clock-controller@402e0000 { reg = <0 0x402e0000 0 0x10000>; + compatible = "sprd,sc9860-aon-gate"; + clocks = <&aon_prediv 0>; + #clock-cells = <1>; }; - ana_regs: syscon@40400000 { - compatible = "syscon"; + pll: clock-controller@40400000 { reg = <0 0x40400000 0 0x10000>; + compatible = "sprd,sc9860-pll"; + clocks = <&pmu_gate 0>; + #clock-cells = <1>; }; - agcp_regs: syscon@415e0000 { - compatible = "syscon"; + agcp_gate: clock-controller@415e0000 { reg = <0 0x415e0000 0 0x1000000>; + compatible = "sprd,sc9860-agcp-gate"; + clocks = <&aon_prediv 0>; + #clock-cells = <1>; }; - vsp_regs: syscon@61100000 { - compatible = "syscon"; + vsp_gate: clock-controller@61100000 { reg = <0 0x61100000 0 0x10000>; + compatible = "sprd,sc9860-vsp-gate"; + clocks = <&vsp_clk 0>; + #clock-cells = <1>; }; - cam_regs: syscon@62100000 { - compatible = "syscon"; + cam_gate: clock-controller@62100000 { reg = <0 0x62100000 0 0x10000>; + compatible = "sprd,sc9860-cam-gate"; + clocks = <&cam_clk 0>; + #clock-cells = <1>; }; - disp_regs: syscon@63100000 { - compatible = "syscon"; + disp_gate: clock-controller@63100000 { reg = <0 0x63100000 0 0x10000>; + compatible = "sprd,sc9860-disp-gate"; + clocks = <&disp_clk 0>; + #clock-cells = <1>; }; - ap_apb_regs: syscon@70b00000 { - compatible = "syscon"; + apapb_gate: clock-controller@70b00000 { reg = <0 0x70b00000 0 0x40000>; + compatible = "sprd,sc9860-apapb-gate"; + clocks = <&ap_clk 0>; + #clock-cells = <1>; }; ap-apb@70000000 { |