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path: root/drivers/gpu/drm/panel/panel-simple.c
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Diffstat (limited to 'drivers/gpu/drm/panel/panel-simple.c')
-rw-r--r--drivers/gpu/drm/panel/panel-simple.c92
1 files changed, 61 insertions, 31 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index da6b71b70a46..b26b682826bc 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -4106,6 +4106,30 @@ static const struct panel_desc qishenglong_gopher2b_lcd = {
.connector_type = DRM_MODE_CONNECTOR_DPI,
};
+static const struct display_timing raystar_rff500f_awh_dnn_timing = {
+ .pixelclock = { 23000000, 25000000, 27000000 },
+ .hactive = { 800, 800, 800 },
+ .hback_porch = { 4, 8, 48 },
+ .hfront_porch = { 4, 8, 48 },
+ .hsync_len = { 2, 4, 8 },
+ .vactive = { 480, 480, 480 },
+ .vback_porch = { 4, 8, 12 },
+ .vfront_porch = { 4, 8, 12 },
+ .vsync_len = { 2, 4, 8 },
+};
+
+static const struct panel_desc raystar_rff500f_awh_dnn = {
+ .timings = &raystar_rff500f_awh_dnn_timing,
+ .num_timings = 1,
+ .bpc = 8,
+ .size = {
+ .width = 108,
+ .height = 65,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
static const struct display_timing rocktech_rk043fn48h_timing = {
.pixelclock = { 6000000, 9000000, 12000000 },
.hactive = { 480, 480, 480 },
@@ -4223,6 +4247,37 @@ static const struct panel_desc samsung_ltl101al01 = {
.connector_type = DRM_MODE_CONNECTOR_LVDS,
};
+static const struct display_timing samsung_ltl106al01_timing = {
+ .pixelclock = { 71980000, 71980000, 71980000 },
+ .hactive = { 1366, 1366, 1366 },
+ .hfront_porch = { 56, 56, 56 },
+ .hback_porch = { 106, 106, 106 },
+ .hsync_len = { 14, 14, 14 },
+ .vactive = { 768, 768, 768 },
+ .vfront_porch = { 3, 3, 3 },
+ .vback_porch = { 6, 6, 6 },
+ .vsync_len = { 1, 1, 1 },
+ .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
+};
+
+static const struct panel_desc samsung_ltl106al01 = {
+ .timings = &samsung_ltl106al01_timing,
+ .num_timings = 1,
+ .bpc = 8,
+ .size = {
+ .width = 235,
+ .height = 132,
+ },
+ .delay = {
+ .prepare = 5,
+ .enable = 10,
+ .disable = 10,
+ .unprepare = 5,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
static const struct drm_display_mode samsung_ltn101nt05_mode = {
.clock = 54030,
.hdisplay = 1024,
@@ -5379,6 +5434,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "qishenglong,gopher2b-lcd",
.data = &qishenglong_gopher2b_lcd,
}, {
+ .compatible = "raystar,rff500f-awh-dnn",
+ .data = &raystar_rff500f_awh_dnn,
+ }, {
.compatible = "rocktech,rk043fn48h",
.data = &rocktech_rk043fn48h,
}, {
@@ -5391,6 +5449,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "samsung,ltl101al01",
.data = &samsung_ltl101al01,
}, {
+ .compatible = "samsung,ltl106al01",
+ .data = &samsung_ltl106al01,
+ }, {
.compatible = "samsung,ltn101nt05",
.data = &samsung_ltn101nt05,
}, {
@@ -5600,34 +5661,6 @@ static const struct panel_desc_dsi boe_tv080wum_nl0 = {
.lanes = 4,
};
-static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
- .clock = 71000,
- .hdisplay = 800,
- .hsync_start = 800 + 32,
- .hsync_end = 800 + 32 + 1,
- .htotal = 800 + 32 + 1 + 57,
- .vdisplay = 1280,
- .vsync_start = 1280 + 28,
- .vsync_end = 1280 + 28 + 1,
- .vtotal = 1280 + 28 + 1 + 14,
-};
-
-static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
- .desc = {
- .modes = &lg_ld070wx3_sl01_mode,
- .num_modes = 1,
- .bpc = 8,
- .size = {
- .width = 94,
- .height = 151,
- },
- .connector_type = DRM_MODE_CONNECTOR_DSI,
- },
- .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
- .format = MIPI_DSI_FMT_RGB888,
- .lanes = 4,
-};
-
static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
.clock = 67000,
.hdisplay = 720,
@@ -5752,9 +5785,6 @@ static const struct of_device_id dsi_of_match[] = {
.compatible = "boe,tv080wum-nl0",
.data = &boe_tv080wum_nl0
}, {
- .compatible = "lg,ld070wx3-sl01",
- .data = &lg_ld070wx3_sl01
- }, {
.compatible = "lg,lh500wx1-sd03",
.data = &lg_lh500wx1_sd03
}, {