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Add the IMX290 sensor node description to the device tree file,
which will be controlled via I2C bus with image data transmission
through MIPI CSI-2 interface.
Add CSI-2, adapter and ISP nodes for C3 family.
Signed-off-by: Keke Li <keke.li@amlogic.com>
Link: https://patch.msgid.link/20250918-b4-c3isp-v1-1-5f48db6516c9@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Fix reg address for c3 pwm node.
Fixes: be90cd4bd422 ("arm64: dts: amlogic: Add Amlogic C3 PWM")
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20250717-fix-pwm-node-v2-1-7365ac7d5320@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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As per C3 datasheet add missing cache information to the Amlogic C3 SoC.
- Each Cortex-A53 core has 32KB of L1 instruction cache available and
32KB of L1 data cache available.
- Along with 512KB Unified L2 cache.
Cache memory significantly reduces the time it takes for the CPU
to access data and instructions, leading to faster program execution
and overall system responsiveness.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20250825065240.22577-9-linux.amoon@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add the RTC controller node for C3 SoC family.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250717-rtc-c3-node-v1-2-4f9ae059b8e6@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add the clk-measure controller node for C3 SoC family.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
Link: https://lore.kernel.org/r/20250415-clk-measure-v3-6-9b8551dd33b4@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add device nodes for PWM_AB, PWM_CD, PWM_EF, PWM_GH, PWM_IJ, PWM_KL
and PWM_MN, along with the GPIO pin configurations for each channel.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com>
Link: https://lore.kernel.org/r/20240914-c3-pwm-v2-2-ac1f34c68ac2@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Fix warning when use W=1 to build dtb, as following error:
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi:65.7-76.4: Warning
(unit_address_vs_reg): /sram: node has a reg or ranges property,
but no unit name
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi:168.34-413.6: Warning
(unit_address_vs_reg): /soc/bus@fe000000/pinctrl@4000: node has a
unit name, but no reg or ranges property
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi:168.34-413.6: Warning
(simple_bus_reg): /soc/bus@fe000000/pinctrl@4000: missing or empty
reg/ranges property
arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts:205.9-245.4:
Warning (avoid_unnecessary_addr_size): /soc/bus@fe000000/spi@56000
/nand@0: unnecessary #address-cells/#size-cells without "ranges",
"dma-ranges" or child "reg" property
Fixes: d4bd8f3023b6 ("arm64: dts: amlogic: add C3 AW419 board")
Fixes: 520b792e8317 ("arm64: dts: amlogic: add some device nodes for C3")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/r/202409010005.A7tSzgEn-lkp@intel.com/
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20240902-fix_warning-v1-1-037029c584fc@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add some device nodes for SoC C3, including periphs clock controller
node, PLL clock controller node, SPICC node, regulator node, NAND
controller node, sdcard node, Ethernet MAC and PHY node.
The sdacrd depends on regulator and pinctrl(select), so some
property fields are placed at the board level. The nand chip
is placed on the board, So some property fields about SPIFC
and NAND controller node are placed at the board level.
THe Ethernet MAC support outchip PHY, so place this property
field(select PHY) at the board level.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240830-c3_add_node-v4-2-b56c0511e9dc@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add node for board info registers, which allows getting SoC family and
board revision.
For example, with MESON_GX_SOCINFO config enabled we can get the
following information for board with Amlogic C3 SoC:
soc soc0: Amlogic C3 (C308L) Revision 3d:a (1:1) Detected
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240719-soc_info-v3-4-020a3b687c0c@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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This fixes the following:
interrupt-controller@4080: compatible: 'oneOf' conditional failed, one must be fixed:
['amlogic,meson-gpio-intc', 'amlogic,c3-gpio-intc'] is too long
'amlogic,meson-gpio-intc' is not one of ['amlogic,meson8-gpio-intc', 'amlogic,meson8b-gpio-intc', 'amlogic,meson-gxbb-gpio-intc', 'amlogic,meson-gxl-gpio-intc', 'amlogic,meson-axg-gpio-intc', 'amlogic,meson-g12a-gpio-intc', 'amlogic,meson-sm1-gpio-intc', 'amlogic,meson-a1-gpio-intc', 'amlogic,meson-s4-gpio-intc', 'amlogic,c3-gpio-intc', 'amlogic,t7-gpio-intc']
'amlogic,meson-gpio-intc' was expected
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20240606-topic-amlogic-upstream-bindings-fixes-dts-v1-9-62e812729541@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add the reset controller device of Amlogic C3 SoC family
Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230914064018.18790-4-zelong.dong@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add watchdog device.
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231027104358.342861-3-huqiang.qin@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Enable power domain controller for Amlogic C3 SoC
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230707003710.2667989-5-xianwei.zhao@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add gpio interrupt controller device and pinctrl device.
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Link: https://lore.kernel.org/r/20230720114639.833436-1-huqiang.qin@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Amlogic C3 is an advanced edge AI processor designed for smart IP camera
applications.
Add basic support for the C3 based Amlogic AW409 board, which describes
the following components: CPU, GIC, IRQ, Timer, UART. It's capable of
booting up into the serial console.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20230515093237.2203171-1-xianwei.zhao@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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