diff options
| author | Bartosz Golaszewski <bartosz.golaszewski@linaro.org> | 2025-06-25 17:28:38 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-06-25 14:32:22 -0500 |
| commit | 08a1ea3fe85f8974c96a690f7f8c83d629d08510 (patch) | |
| tree | b601e9c181fd46c8c12406fe01e0e0f26f8b5d18 | |
| parent | 56cf5ad39a55892a3b362c7d6c2997155be7538e (diff) | |
arm64: dts: qcom: sm6115: add debug UART pins
We should not rely on the bootloader to set up the pinmux of the debug
UART port. Let's add pin definitions for uart4 to tlmm and bind them to
the relevant device node.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20250625152839.193672-1-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm6115.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index c8865779173e..91fc36b59abf 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -721,6 +721,13 @@ bias-pull-up; }; + qup_uart4_default: qup-uart4-default-state { + pins = "gpio12", "gpio13"; + function = "qup4"; + drive-strength = <2>; + bias-disable; + }; + sdc1_state_on: sdc1-on-state { clk-pins { pins = "sdc1_clk"; @@ -1565,6 +1572,8 @@ reg = <0x0 0x04a90000 0x0 0x4000>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart4_default>; interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>; interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, |