diff options
| author | Christian Marangi <ansuelsmth@gmail.com> | 2025-10-20 13:11:08 +0200 |
|---|---|---|
| committer | Manivannan Sadhasivam <mani@kernel.org> | 2025-10-21 07:29:34 +0530 |
| commit | 2d58bc777728bfc37aa35dce7b90e72296cceb9f (patch) | |
| tree | 36e9a59672e65f534defbb5ece304976b8e014a4 | |
| parent | 04305367fab7ec9c98eeba315ad09c8b20abce93 (diff) | |
PCI: mediatek: Use generic MACRO for TPVPERL delay
Use the generic PCI MACRO for TPVPERL delay to wait for clock and power
stabilization after PERST# Signal instead of the raw value of 100 ms.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patch.msgid.link/20251020111121.31779-5-ansuelsmth@gmail.com
| -rw-r--r-- | drivers/pci/controller/pcie-mediatek.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c index cbffa3156da1..313da61a0b8a 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -697,12 +697,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) */ writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL); - /* - * Described in PCIe CEM specification sections 2.2 (PERST# Signal) and - * 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should - * be delayed 100ms (TPVPERL) for the power and clock to become stable. - */ - msleep(100); + msleep(PCIE_T_PVPERL_MS); /* De-assert PHY, PE, PIPE, MAC and configuration reset */ val = readl(port->base + PCIE_RST_CTRL); |