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authorVille Syrjälä <ville.syrjala@linux.intel.com>2025-07-10 23:17:13 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-07-17 19:41:24 +0300
commitf0da19347bccee1c20091e9fd597a2f197792021 (patch)
treeafcd5372fe1b68f29b6ac960b6cc85033af78331
parenta8b874694db5cae7baaf522756f87acd956e6e66 (diff)
drm/i915/dp: Don't switch to idle pattern before disable on pre-hsw
For some reason we are switching over to the idle pattern before disabling the DP port on pre-hsw. AFAICS this has never been part of the documented sequence (and on hsw+ the spec explicitly says not to do this). Get rid of it. The code goes all the way back to commit 5eb08b69f510 ("drm/i915: enable DisplayPort support on IGDNG"), and it was accompanied by a 17ms delay which got changed to vbl wait in commit ab527efc2fea ("drm/i915: use wait_for_vblank instead of msleep(17)"), and was later completely removed in commit 93c9c19b3d25 ("drm/i915: remove unexplained vblank wait in the DP off code"). Smoke tested on g4x/snb/chv. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250710201718.25310-3-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak <imre.deak@intel.com>
-rw-r--r--drivers/gpu/drm/i915/display/g4x_dp.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 87f6b9602b16..b54edf0d1c23 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -424,17 +424,6 @@ intel_dp_link_down(struct intel_encoder *encoder,
drm_dbg_kms(display->drm, "\n");
- if ((display->platform.ivybridge && port == PORT_A) ||
- (HAS_PCH_CPT(display) && port != PORT_A)) {
- intel_dp->DP &= ~DP_LINK_TRAIN_MASK_CPT;
- intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE_CPT;
- } else {
- intel_dp->DP &= ~DP_LINK_TRAIN_MASK;
- intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE;
- }
- intel_de_write(display, intel_dp->output_reg, intel_dp->DP);
- intel_de_posting_read(display, intel_dp->output_reg);
-
intel_dp->DP &= ~DP_PORT_EN;
intel_de_write(display, intel_dp->output_reg, intel_dp->DP);
intel_de_posting_read(display, intel_dp->output_reg);