diff options
| author | Mark Brown <broonie@kernel.org> | 2024-03-18 17:30:46 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-03-18 17:30:46 +0000 |
| commit | 5bd249aec71d75f0088357e4aba27fde0610f823 (patch) | |
| tree | ed63b21b48b711430492734564775758a39eb94c /arch/x86/include/asm/cpufeatures.h | |
| parent | 7397175cb7b48f7a3fc699083aa46f1234904c7e (diff) | |
| parent | e8f897f4afef0031fe618a8e94127a0934896aba (diff) | |
spi: Merge up v6.8 release
An i.MX fix depends on other fixes that were sent to v6.8.
Diffstat (limited to 'arch/x86/include/asm/cpufeatures.h')
| -rw-r--r-- | arch/x86/include/asm/cpufeatures.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index fdf723b6f6d0..2b62cdd8dd12 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -95,7 +95,7 @@ #define X86_FEATURE_SYSENTER32 ( 3*32+15) /* "" sysenter in IA32 userspace */ #define X86_FEATURE_REP_GOOD ( 3*32+16) /* REP microcode works well */ #define X86_FEATURE_AMD_LBR_V2 ( 3*32+17) /* AMD Last Branch Record Extension Version 2 */ -/* FREE, was #define X86_FEATURE_LFENCE_RDTSC ( 3*32+18) "" LFENCE synchronizes RDTSC */ +#define X86_FEATURE_CLEAR_CPU_BUF ( 3*32+18) /* "" Clear CPU buffers using VERW */ #define X86_FEATURE_ACC_POWER ( 3*32+19) /* AMD Accumulated Power Mechanism */ #define X86_FEATURE_NOPL ( 3*32+20) /* The NOPL (0F 1F) instructions */ #define X86_FEATURE_ALWAYS ( 3*32+21) /* "" Always-present feature */ |