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authorNathan Chancellor <nathan@kernel.org>2025-09-19 13:43:11 -0700
committerNathan Chancellor <nathan@kernel.org>2025-09-19 13:43:11 -0700
commit95ee3364b29313a7587b7d1e42a9d043aaf7e592 (patch)
treecefa28373f4ee2c696925a0d68363987150bc8c6 /arch/x86/kernel/cpu/microcode/amd.c
parentaa943a280e88e3585ed5a06d55e78c4123fcead3 (diff)
parentf83ec76bf285bea5727f478a68b894f5543ca76e (diff)
Merge 6.17-rc6 into kbuild-next
Commit bd7c2312128e ("pinctrl: meson: Fix typo in device table macro") is needed in kbuild-next to avoid a build error with a future change. While at it, address the conflict between commit 41f9049cff32 ("riscv: Only allow LTO with CMODEL_MEDANY") and commit 6578a1ff6aa4 ("riscv: Remove version check for LTO_CLANG selects"), as reported by Stephen Rothwell [1]. Link: https://lore.kernel.org/20250908134913.68778b7b@canb.auug.org.au/ [1] Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/microcode/amd.c')
-rw-r--r--arch/x86/kernel/cpu/microcode/amd.c22
1 files changed, 20 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index 097e39327942..514f63340880 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -171,8 +171,28 @@ static int cmp_id(const void *key, const void *elem)
return 1;
}
+static u32 cpuid_to_ucode_rev(unsigned int val)
+{
+ union zen_patch_rev p = {};
+ union cpuid_1_eax c;
+
+ c.full = val;
+
+ p.stepping = c.stepping;
+ p.model = c.model;
+ p.ext_model = c.ext_model;
+ p.ext_fam = c.ext_fam;
+
+ return p.ucode_rev;
+}
+
static bool need_sha_check(u32 cur_rev)
{
+ if (!cur_rev) {
+ cur_rev = cpuid_to_ucode_rev(bsp_cpuid_1_eax);
+ pr_info_once("No current revision, generating the lowest one: 0x%x\n", cur_rev);
+ }
+
switch (cur_rev >> 8) {
case 0x80012: return cur_rev <= 0x800126f; break;
case 0x80082: return cur_rev <= 0x800820f; break;
@@ -749,8 +769,6 @@ static struct ucode_patch *cache_find_patch(struct ucode_cpu_info *uci, u16 equi
n.equiv_cpu = equiv_cpu;
n.patch_id = uci->cpu_sig.rev;
- WARN_ON_ONCE(!n.patch_id);
-
list_for_each_entry(p, &microcode_cache, plist)
if (patch_cpus_equivalent(p, &n, false))
return p;