summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
diff options
context:
space:
mode:
authorWenjing Liu <wenjing.liu@amd.com>2024-05-10 12:43:53 -0400
committerAlex Deucher <alexander.deucher@amd.com>2024-06-05 11:04:58 -0400
commit7069484dbebc293f3696553ba1e38c67dba438f6 (patch)
tree07bb3354deb5d6cae3ab0e8143d22e02b2b6e7dd /drivers/gpu/drm/amd/display/dc/link/link_dpms.c
parent975507d73c44e9382478d6fd2d49c5e660cca4f4 (diff)
drm/amd/display: turn on symclk for dio virtual stream in dpms sequence
[why] In order to support glitchless display clock ramping for virtual stream, we must turn on symclk for stream encoder. The code will power on phy and enable symclk for dio encoder during virtual stream dpms sequence. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/link/link_dpms.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/link/link_dpms.c31
1 files changed, 16 insertions, 15 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index 955c720fb565..a9ddbe12142f 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -1907,7 +1907,9 @@ static void disable_link(struct dc_link *link,
{
if (dc_is_dp_signal(signal)) {
disable_link_dp(link, link_res, signal);
- } else if (signal != SIGNAL_TYPE_VIRTUAL) {
+ } else if (signal == SIGNAL_TYPE_VIRTUAL) {
+ link->dc->hwss.disable_link_output(link, link_res, SIGNAL_TYPE_DISPLAY_PORT);
+ } else {
link->dc->hwss.disable_link_output(link, link_res, signal);
}
@@ -2154,6 +2156,18 @@ static enum dc_status enable_link_dp_mst(
return enable_link_dp(state, pipe_ctx);
}
+static enum dc_status enable_link_virtual(struct pipe_ctx *pipe_ctx)
+{
+ struct dc_link *link = pipe_ctx->stream->link;
+
+ link->dc->hwss.enable_dp_link_output(link,
+ &pipe_ctx->link_res,
+ SIGNAL_TYPE_DISPLAY_PORT,
+ pipe_ctx->clock_source->id,
+ &pipe_ctx->link_config.dp_link_settings);
+ return DC_OK;
+}
+
static enum dc_status enable_link(
struct dc_state *state,
struct pipe_ctx *pipe_ctx)
@@ -2193,7 +2207,7 @@ static enum dc_status enable_link(
status = DC_OK;
break;
case SIGNAL_TYPE_VIRTUAL:
- status = DC_OK;
+ status = enable_link_virtual(pipe_ctx);
break;
default:
break;
@@ -2437,17 +2451,10 @@ void link_set_dpms_on(
if (!dc_is_virtual_signal(pipe_ctx->stream->signal)
&& !dp_is_128b_132b_signal(pipe_ctx)) {
- struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc;
-
if (link_enc)
link_enc->funcs->setup(
link_enc,
pipe_ctx->stream->signal);
-
- if (stream_enc && stream_enc->funcs->dig_stream_enable)
- stream_enc->funcs->dig_stream_enable(
- stream_enc,
- pipe_ctx->stream->signal, 1);
}
pipe_ctx->stream->link->link_state_valid = true;
@@ -2547,18 +2554,12 @@ void link_set_dpms_on(
*/
if (!(dc_is_virtual_signal(pipe_ctx->stream->signal) ||
dp_is_128b_132b_signal(pipe_ctx))) {
- struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc;
if (link_enc)
link_enc->funcs->setup(
link_enc,
pipe_ctx->stream->signal);
- if (stream_enc && stream_enc->funcs->dig_stream_enable)
- stream_enc->funcs->dig_stream_enable(
- stream_enc,
- pipe_ctx->stream->signal, 1);
-
}
dc->hwss.enable_stream(pipe_ctx);