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authorTvrtko Ursulin <tvrtko.ursulin@intel.com>2022-02-25 13:44:44 +0000
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2022-02-25 13:44:44 +0000
commitdb927686e43ffebfc5d1693c1cb4fd74f462d99b (patch)
tree0cbd82aea0825efc1cb10bad4af664ed1bed9b83 /drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
parentb8986c889e7ac26c57cb548f8f344456fa925a2f (diff)
parent54f43c17d681f6d9523fcfaeefc9df77993802e1 (diff)
Merge drm/drm-next into drm-intel-gt-next
Matt needed some buddy allocator changes for landing DG2 small BAR support patches. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h')
-rw-r--r--drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h13
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 873ecd04e01d..fb01ff49e655 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -46,10 +46,10 @@
/* Firmware versioning. */
#ifdef DMUB_EXPOSE_VERSION
-#define DMUB_FW_VERSION_GIT_HASH 0xbaf06b95
+#define DMUB_FW_VERSION_GIT_HASH 0x1422ef84
#define DMUB_FW_VERSION_MAJOR 0
#define DMUB_FW_VERSION_MINOR 0
-#define DMUB_FW_VERSION_REVISION 98
+#define DMUB_FW_VERSION_REVISION 104
#define DMUB_FW_VERSION_TEST 0
#define DMUB_FW_VERSION_VBIOS 0
#define DMUB_FW_VERSION_HOTFIX 0
@@ -367,8 +367,9 @@ union dmub_fw_boot_options {
/**< 1 if all root clock gating is enabled and low power memory is enabled*/
uint32_t power_optimization: 1;
uint32_t diag_env: 1; /* 1 if diagnostic environment */
+ uint32_t gpint_scratch8: 1; /* 1 if GPINT is in scratch8*/
- uint32_t reserved : 19; /**< reserved */
+ uint32_t reserved : 18; /**< reserved */
} bits; /**< boot bits */
uint32_t all; /**< 32-bit access to bits */
};
@@ -523,7 +524,7 @@ union dmub_inbox0_cmd_lock_hw {
uint32_t command_code: 8;
/* NOTE: Must be have enough bits to match: enum hw_lock_client */
- uint32_t hw_lock_client: 1;
+ uint32_t hw_lock_client: 2;
/* NOTE: Below fields must match with: struct dmub_hw_lock_inst_flags */
uint32_t otg_inst: 3;
@@ -538,7 +539,7 @@ union dmub_inbox0_cmd_lock_hw {
uint32_t lock: 1; /**< Lock */
uint32_t should_release: 1; /**< Release */
- uint32_t reserved: 8; /**< Reserved for extending more clients, HW, etc. */
+ uint32_t reserved: 7; /**< Reserved for extending more clients, HW, etc. */
} bits;
uint32_t all;
};
@@ -644,6 +645,7 @@ enum dmub_cmd_type {
* Command type used for OUTBOX1 notification enable
*/
DMUB_CMD__OUTBOX1_ENABLE = 71,
+
/**
* Command type used for all idle optimization commands.
*/
@@ -656,6 +658,7 @@ enum dmub_cmd_type {
* Command type used for all panel control commands.
*/
DMUB_CMD__PANEL_CNTL = 74,
+
/**
* Command type used for interfacing with DPIA.
*/