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authorVille Syrjälä <ville.syrjala@linux.intel.com>2024-12-10 23:10:04 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-01-15 19:50:00 +0200
commit8b85eadabd0902bde4562c493f4e1068a0c80c2b (patch)
tree4271127714a2e2306c006d08062a5df093928e8e /drivers/gpu/drm/i915/display/intel_crtc.c
parentb6e4f92a21e35ca8bd7b21b4b5866da59dd51c04 (diff)
drm/i915/vrr: Add extra vblank delay to estimates
On ICL/TGL the VRR hardware injects an extra scanline just after vactive. This essentically behaves the same as an extra line of vblank delay, except it only appears in this one specific spot. Consider our DSB interrupt signalling scheme: 1. arm the update 2. wait for undelayed vblank (or rather safe window with VRR) 3. wait for enough usecs to get past the delayed vblank 4. signal interrupt to indicate that arming has latched If step 2 waits for end of vactive step 3 needs to account for the extra one scanline, or else we risk signalling the interrupt before the delayed vblank has actually elapsed. So include the extra scanline in our vblank delay estimates. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241210211007.5976-16-ville.syrjala@linux.intel.com Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_crtc.c')
0 files changed, 0 insertions, 0 deletions