diff options
| author | Imre Deak <imre.deak@intel.com> | 2025-10-15 19:19:32 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2025-10-17 21:48:47 +0300 |
| commit | 7c027070e98d7b515e4d3a94b54d288c61cb5918 (patch) | |
| tree | ab0f340037b73d0f84eae62ff5cf7f405256c878 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | b762ae48293e2cc2145cdc91eb596d057f1aff11 (diff) | |
drm/i915/dp_mst: Track DSC enabled status on the MST link
Track whether DSC is enabled on any CRTC on a link. On DP-SST (and DSI)
this will always match the CRTC's DSC state, those links having only a
single stream (aka CRTC). For instance, on DP-MST if DSC is enabled for
CRTC#0, but disabled for CRTC#1, the DSC/FEC state for these CRTCs will
be as follows:
CRTC#0:
- compression_enable = true
- compression_enabled_on_link = true
- fec_enable = true for 8b10b, false for 128b132b
CRTC#1:
- compression_enable = false
- compression_enabled_on_link = true
- fec_enable = true for 8b10b, false for 128b132b
This patch only sets compression_enabled_on_link for CRTC#0 above and
enables FEC on CRTC#0 if DSC was enabled on any other CRTC on the 8b10b
MST link. A follow-up change will make sure that the state of all the
CRTCs (CRTC#1 above) on an MST link is recomputed if DSC gets enabled on
any CRTC, setting compression_enabled_on_link and fec_enable for these.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20251015161934.262108-6-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions