diff options
| author | Mark Brown <broonie@kernel.org> | 2019-06-10 18:52:53 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-06-10 18:52:53 +0100 |
| commit | 4343f61103cdb8ccd6f3d5dd7168f1176a1cee37 (patch) | |
| tree | 3db0a2e099cf7feb0c2d60d2a4bf1bf10d5253db /drivers/gpu/drm/imx/ipuv3-plane.c | |
| parent | aef9752274f4045b0dab577e113da63c96832f77 (diff) | |
| parent | d1fdb6d8f6a4109a4263176c84b899076a5f8008 (diff) | |
Merge tag 'v5.2-rc4' into spi-5.3
Linux 5.2-rc4
Diffstat (limited to 'drivers/gpu/drm/imx/ipuv3-plane.c')
| -rw-r--r-- | drivers/gpu/drm/imx/ipuv3-plane.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index d7a727a6e3d7..91edfe2498a6 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -605,7 +605,6 @@ static void ipu_plane_atomic_update(struct drm_plane *plane, active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch); ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba); ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active); - ipu_plane->next_buf = !active; if (ipu_plane_separate_alpha(ipu_plane)) { active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch); ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active, @@ -710,7 +709,6 @@ static void ipu_plane_atomic_update(struct drm_plane *plane, ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba); ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts); ipu_plane_enable(ipu_plane); - ipu_plane->next_buf = -1; } static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = { @@ -732,10 +730,15 @@ bool ipu_plane_atomic_update_pending(struct drm_plane *plane) if (ipu_state->use_pre) return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch); - else if (ipu_plane->next_buf >= 0) - return ipu_idmac_get_current_buffer(ipu_plane->ipu_ch) != - ipu_plane->next_buf; + /* + * Pretend no update is pending in the non-PRE/PRG case. For this to + * happen, an atomic update would have to be deferred until after the + * start of the next frame and simultaneously interrupt latency would + * have to be high enough to let the atomic update finish and issue an + * event before the previous end of frame interrupt handler can be + * executed. + */ return false; } int ipu_planes_assign_pre(struct drm_device *dev, |