diff options
| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-07-31 09:39:56 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-07-31 09:39:56 +0200 |
| commit | fe3015748a905e08eb0e1750aa2928f520063d59 (patch) | |
| tree | d15524d1f7931e8e5964e9ff8368792d09282da5 /drivers/net/phy | |
| parent | 16aae4c64600a6319a6f10dbff833fa198bf9599 (diff) | |
| parent | 5d0c230f1de8c7515b6567d9afba1f196fb4e2f4 (diff) | |
Merge 6.5-rc4 into tty-next
We need the serial/tty fixes in here as well for testing and future
development.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/net/phy')
| -rw-r--r-- | drivers/net/phy/marvell10g.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 55d9d7acc32e..d4bb90d76881 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -328,6 +328,13 @@ static int mv3310_power_up(struct phy_device *phydev) ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, MV_V2_PORT_CTRL_PWRDOWN); + /* Sometimes, the power down bit doesn't clear immediately, and + * a read of this register causes the bit not to clear. Delay + * 100us to allow the PHY to come out of power down mode before + * the next access. + */ + udelay(100); + if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310 || priv->firmware_ver < 0x00030000) return ret; |