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authorJim Quinlan <james.quinlan@broadcom.com>2025-10-29 15:36:14 -0400
committerBjorn Helgaas <bhelgaas@google.com>2025-11-13 10:45:28 -0600
commita3f00f24d67014721e4efed9238be77b5b67f6fe (patch)
tree7a947627110ae594f837d8f9728a3ddb3b5bde7a /drivers/pci/controller/dwc/pcie-designware.c
parent9583f9d22991d2cfb5cc59a2552040c4ae98d998 (diff)
PCI: brcmstb: Add a way to indicate if PCIe bridge is active
In a future commit, a new handler will be introduced that in part does reads and writes to some of the PCIe registers. When this handler is invoked, it is paramount that it does not do these register accesses when the PCIe bridge is inactive, as this will cause CPU abort errors. To solve this we keep a spinlock that guards a variable which indicates whether the bridge is on or off. When the bridge is on, access of the PCIe HW registers may proceed. Since there are multiple ways to reset the bridge, we introduce a general function to obtain the spinlock, call the specific function that is used for the specific SoC, sets the bridge active indicator variable, and releases the spinlock. Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20251029193616.3670003-2-james.quinlan@broadcom.com
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware.c')
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