Merge branch 'pci/controller/linkup-fix'

- Rename PCIE_RESET_CONFIG_DEVICE_WAIT_MS to PCIE_RESET_CONFIG_WAIT_MS (the
  required delay before sending config requests after a reset) (Niklas
  Cassel)

- PCIE_T_RRS_READY_MS and PCIE_RESET_CONFIG_WAIT_MS were two names for the
  same delay; replace PCIE_T_RRS_READY_MS with PCIE_RESET_CONFIG_WAIT_MS
  and remove PCIE_T_RRS_READY_MS (Niklas Cassel)

- Add required PCIE_RESET_CONFIG_WAIT_MS delay after Link up IRQ to
  dw-rockchip, qcom (Niklas Cassel)

- Add required PCIE_RESET_CONFIG_WAIT_MS after waiting for Link up on
  Ports that support > 5.0 GT/s in dwc core (Niklas Cassel)

- Move LINK_WAIT_SLEEP_MS and LINK_WAIT_MAX_RETRIES to pci.h and prefix
  with 'PCIE_' for potential sharing across drivers (Niklas Cassel)

* pci/controller/linkup-fix:
  PCI: Move link up wait time and max retries macros to pci.h
  PCI: dwc: Ensure that dw_pcie_wait_for_link() waits 100 ms after link up
  PCI: qcom: Wait PCIE_RESET_CONFIG_WAIT_MS after link-up IRQ
  PCI: dw-rockchip: Wait PCIE_RESET_CONFIG_WAIT_MS after link-up IRQ
  PCI: rockchip-host: Use macro PCIE_RESET_CONFIG_WAIT_MS
  PCI: Rename PCIE_RESET_CONFIG_DEVICE_WAIT_MS to PCIE_RESET_CONFIG_WAIT_MS

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index c789e3f85655..9b12f2f02042 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1564,6 +1564,7 @@ static irqreturn_t qcom_pcie_global_irq_thread(int irq, void *data)
 	writel_relaxed(status, pcie->parf + PARF_INT_ALL_CLEAR);
 
 	if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) {
+		msleep(PCIE_RESET_CONFIG_WAIT_MS);
 		dev_dbg(dev, "Received Link up event. Starting enumeration!\n");
 		/* Rescan the bus to enumerate endpoint devices */
 		pci_lock_rescan_remove();