diff options
| author | Christian Bruel <christian.bruel@foss.st.com> | 2025-11-14 09:08:05 +0100 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2025-11-17 14:33:13 -0600 |
| commit | ff529a9307a03ec03ed9751da053b57149300053 (patch) | |
| tree | 2371fe06e0e8a15ca79682fb1787af6fcad80546 /drivers/pci/controller/dwc | |
| parent | fa81d6099007728cae39c6f937d83903bbddab5e (diff) | |
PCI: stm32: Fix EP page_size alignment
pci_epc_mem_alloc_addr() allocates a CPU address from the ATU window phys
base and a page number. Set the ep->page_size so the resulting CPU address
is correctly aligned with the ATU required alignment.
Fixes: 151f3d29baf4 ("PCI: stm32-ep: Add PCIe Endpoint support for STM32MP25")
Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
[mani: added fixes tag]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20251114-atu_align_ep-v1-1-88da5366fa04@foss.st.com
Diffstat (limited to 'drivers/pci/controller/dwc')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-stm32-ep.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-stm32-ep.c b/drivers/pci/controller/dwc/pcie-stm32-ep.c index faa6433a784f..7d48038d576d 100644 --- a/drivers/pci/controller/dwc/pcie-stm32-ep.c +++ b/drivers/pci/controller/dwc/pcie-stm32-ep.c @@ -214,6 +214,8 @@ static int stm32_add_pcie_ep(struct stm32_pcie *stm32_pcie, ep->ops = &stm32_pcie_ep_ops; + ep->page_size = stm32_pcie_epc_features.align; + ret = dw_pcie_ep_init(ep); if (ret) { dev_err(dev, "Failed to initialize ep: %d\n", ret); |