diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2025-11-27 19:58:59 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-11-28 18:03:43 +0000 |
| commit | cb5c2eb459f4c98d584eaf3d3ea7c3612385d081 (patch) | |
| tree | 64f772f8c13119824b30b5b3313539b4e5ccacb3 /drivers/spi/spi-microchip-core-spi.c | |
| parent | 545d1287e40a55242f6ab68bcc1ba3b74088b1bc (diff) | |
spi: microchip-core: Refactor FIFO read and write handlers
Make both handlers to be shorter and easier to understand.
While at it, unify their style.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Link: https://patch.msgid.link/20251127190031.2998705-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-microchip-core-spi.c')
| -rw-r--r-- | drivers/spi/spi-microchip-core-spi.c | 31 |
1 files changed, 12 insertions, 19 deletions
diff --git a/drivers/spi/spi-microchip-core-spi.c b/drivers/spi/spi-microchip-core-spi.c index 892f066f0074..98bf0e6cd00e 100644 --- a/drivers/spi/spi-microchip-core-spi.c +++ b/drivers/spi/spi-microchip-core-spi.c @@ -97,15 +97,12 @@ static inline void mchp_corespi_read_fifo(struct mchp_corespi *spi, u32 fifo_max MCHP_CORESPI_STATUS_RXFIFO_EMPTY) ; + /* On TX-only transfers always perform a dummy read */ data = readb(spi->regs + MCHP_CORESPI_REG_RXDATA); + if (spi->rx_buf) + *spi->rx_buf++ = data; spi->rx_len--; - if (!spi->rx_buf) - continue; - - *spi->rx_buf = data; - - spi->rx_buf++; } } @@ -127,23 +124,19 @@ static void mchp_corespi_disable_ints(struct mchp_corespi *spi) static inline void mchp_corespi_write_fifo(struct mchp_corespi *spi, u32 fifo_max) { - int i = 0; - - while ((i < fifo_max) && - !(readb(spi->regs + MCHP_CORESPI_REG_STAT) & - MCHP_CORESPI_STATUS_TXFIFO_FULL)) { - u32 word; - - word = spi->tx_buf ? *spi->tx_buf : 0xaa; - writeb(word, spi->regs + MCHP_CORESPI_REG_TXDATA); + for (int i = 0; i < fifo_max; i++) { + if (readb(spi->regs + MCHP_CORESPI_REG_STAT) & + MCHP_CORESPI_STATUS_TXFIFO_FULL) + break; + /* On RX-only transfers always perform a dummy write */ if (spi->tx_buf) - spi->tx_buf++; + writeb(*spi->tx_buf++, spi->regs + MCHP_CORESPI_REG_TXDATA); + else + writeb(0xaa, spi->regs + MCHP_CORESPI_REG_TXDATA); - i++; + spi->tx_len--; } - - spi->tx_len -= i; } static void mchp_corespi_set_cs(struct spi_device *spi, bool disable) |