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| author | Raag Jadav <raag.jadav@intel.com> | 2025-11-12 09:10:10 +0530 |
|---|---|---|
| committer | Bartosz Golaszewski <bartosz.golaszewski@linaro.org> | 2025-11-19 14:08:51 +0100 |
| commit | a0c83150eea5807dbedf786f55cd49b14af118a8 (patch) | |
| tree | 1a7d0dbef5b3a9544c9e0f7d86ce4466c158edfd /rust/kernel/devres.rs | |
| parent | 5ef5f3c2245e13c62adf4cb0980cdd7bd72c59d0 (diff) | |
platform/x86/intel: Introduce Intel Elkhart Lake PSE I/O
Intel Elkhart Lake Programmable Service Engine (PSE) includes two PCI
devices that expose two different capabilities of GPIO and Timed I/O
as a single PCI function through shared MMIO with below layout.
GPIO: 0x0000 - 0x1000
TIO: 0x1000 - 0x2000
This driver enumerates the PCI parent device and creates auxiliary child
devices for these capabilities. The actual functionalities are provided
by their respective auxiliary drivers.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20251112034040.457801-2-raag.jadav@intel.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Diffstat (limited to 'rust/kernel/devres.rs')
0 files changed, 0 insertions, 0 deletions