diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi | 304 |
1 files changed, 304 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi new file mode 100644 index 000000000000..29a428a052b0 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi @@ -0,0 +1,304 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2025 PHYTEC Messtechnik GmbH + * Author: Christoph Stoidner <c.stoidner@phytec.de> + * + * Product homepage: + * https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/ + */ + +#include <dt-bindings/leds/common.h> + +#include "imx91.dtsi" + +/ { + model = "PHYTEC phyCORE-i.MX91"; + compatible = "phytec,imx91-phycore-som", "fsl,imx91"; + + aliases { + ethernet0 = &fec; + }; + + reserved-memory { + ranges; + #address-cells = <2>; + #size-cells = <2>; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + alloc-ranges = <0 0x80000000 0 0x40000000>; + size = <0 0x10000000>; + linux,cma-default; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + led-0 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + reg_vdda_1v8: regulator-vdda-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDA_1V8"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + vin-supply = <&buck5>; + }; +}; + +/* ADC */ +&adc1 { + vref-supply = <®_vdda_1v8>; +}; + +/* Ethernet */ +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + + assigned-clocks = <&clk IMX91_CLK_ENET_TIMER>, + <&clk IMX91_CLK_ENET2_REGULAR>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>, + <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; + assigned-clock-rates = <100000000>, <50000000>; + status = "okay"; + + mdio: mdio { + clock-frequency = <5000000>; + #address-cells = <1>; + #size-cells = <0>; + + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + reset-gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>; + reset-assert-us = <30>; + }; + }; +}; + +/* I2C3 */ +&lpi2c3 { + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_lpi2c3>; + pinctrl-1 = <&pinctrl_lpi2c3_gpio>; + scl-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pmic@25 { + compatible = "nxp,pca9451a"; + reg = <0x25>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; + interrupt-parent = <&gpio4>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + + regulators { + buck1: BUCK1 { + regulator-name = "VDD_SOC"; + regulator-max-microvolt = <950000>; + regulator-min-microvolt = <610000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <3125>; + }; + + buck2: BUCK2 { + regulator-name = "VDDQ_0V6"; + regulator-max-microvolt = <600000>; + regulator-min-microvolt = <600000>; + regulator-boot-on; + regulator-always-on; + }; + + buck4: BUCK4 { + regulator-name = "VDD_3V3_BUCK"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + buck5: BUCK5 { + regulator-name = "VDD_1V8"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + buck6: BUCK6 { + regulator-name = "VDD_1V1"; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1: LDO1 { + regulator-name = "PMIC_SNVS_1V8"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4: LDO4 { + regulator-name = "VDD_0V8"; + regulator-max-microvolt = <800000>; + regulator-min-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo5: LDO5 { + regulator-name = "NVCC_SD2"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + /* EEPROM */ + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + pagesize = <32>; + vcc-supply = <&buck4>; + }; +}; + +/* eMMC */ +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + bus-width = <8>; + non-removable; + no-1-8-v; + status = "okay"; +}; + +/* Watchdog */ +&wdog3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl_fec: fecgrp { + fsl,pins = < + MX91_PAD_ENET2_MDC__ENET2_MDC 0x50e + MX91_PAD_ENET2_MDIO__ENET2_MDIO 0x502 + /* the three pins below are connected to PHYs straps, + * that is what the pull-up/down setting is for. + */ + MX91_PAD_ENET2_RD0__ENET2_RGMII_RD0 0x37e + MX91_PAD_ENET2_RD1__ENET2_RGMII_RD1 0x37e + MX91_PAD_ENET2_RX_CTL__ENET2_RGMII_RX_CTL 0x57e + MX91_PAD_ENET2_TD0__ENET2_RGMII_TD0 0x50e + MX91_PAD_ENET2_TD1__ENET2_RGMII_TD1 0x50e + MX91_PAD_ENET2_TX_CTL__ENET2_RGMII_TX_CTL 0x50e + MX91_PAD_ENET2_TD2__ENET2_TX_CLK2 0x4000050e + MX91_PAD_ENET2_RXC__GPIO4_IO23 0x51e + >; + }; + + pinctrl_leds: ledsgrp { + fsl,pins = < + MX91_PAD_I2C1_SDA__GPIO1_IO1 0x11e + >; + }; + + pinctrl_lpi2c3: lpi2c3grp { + fsl,pins = < + MX91_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e + MX91_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e + >; + }; + + pinctrl_lpi2c3_gpio: lpi2c3gpiogrp { + fsl,pins = < + MX91_PAD_GPIO_IO28__GPIO2_IO28 0x31e + MX91_PAD_GPIO_IO29__GPIO2_IO29 0x31e + >; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = < + MX91_PAD_ENET2_RD3__GPIO4_IO27 0x31e + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX91_PAD_SD1_CLK__USDHC1_CLK 0x179e + MX91_PAD_SD1_CMD__USDHC1_CMD 0x1386 + MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x138e + MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x1386 + MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x138e + MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x1386 + MX91_PAD_SD1_DATA4__USDHC1_DATA4 0x1386 + MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x1386 + MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x1386 + MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x1386 + MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins = < + MX91_PAD_SD1_CLK__USDHC1_CLK 0x17be + MX91_PAD_SD1_CMD__USDHC1_CMD 0x139e + MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x138e + MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x139e + MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x13be + MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x139e + MX91_PAD_SD1_DATA4__USDHC1_DATA4 0x139e + MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x139e + MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x139e + MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x139e + MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins = < + MX91_PAD_SD1_CLK__USDHC1_CLK 0x17be + MX91_PAD_SD1_CMD__USDHC1_CMD 0x139e + MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x139e + MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x13be + MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x13be + MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x13be + MX91_PAD_SD1_DATA4__USDHC1_DATA4 0x13be + MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x13be + MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x13be + MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x13be + MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX91_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e + >; + }; +}; |