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path: root/drivers/gpu/drm/i915/display/intel_bw.c
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Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_bw.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_bw.c17
1 files changed, 4 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 7499ddec2b14..b53bcb693e79 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -871,13 +871,14 @@ static unsigned int intel_bw_crtc_data_rate(const struct intel_crtc_state *crtc_
}
/* "Maximum Pipe Read Bandwidth" */
-static int intel_bw_crtc_min_cdclk(struct intel_display *display,
- unsigned int data_rate)
+int intel_bw_crtc_min_cdclk(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
+
if (DISPLAY_VER(display) < 12)
return 0;
- return DIV_ROUND_UP_ULL(mul_u32_u32(data_rate, 10), 512);
+ return DIV_ROUND_UP_ULL(mul_u32_u32(intel_bw_crtc_data_rate(crtc_state), 10), 512);
}
static unsigned int intel_bw_num_active_planes(struct intel_display *display,
@@ -1292,10 +1293,6 @@ static bool intel_bw_state_changed(struct intel_display *display,
if (intel_dbuf_bw_changed(display, old_dbuf_bw, new_dbuf_bw))
return true;
-
- if (intel_bw_crtc_min_cdclk(display, old_bw_state->data_rate[pipe]) !=
- intel_bw_crtc_min_cdclk(display, new_bw_state->data_rate[pipe]))
- return true;
}
return false;
@@ -1386,16 +1383,10 @@ intel_bw_dbuf_min_cdclk(struct intel_display *display,
int intel_bw_min_cdclk(struct intel_display *display,
const struct intel_bw_state *bw_state)
{
- enum pipe pipe;
int min_cdclk;
min_cdclk = intel_bw_dbuf_min_cdclk(display, bw_state);
- for_each_pipe(display, pipe)
- min_cdclk = max(min_cdclk,
- intel_bw_crtc_min_cdclk(display,
- bw_state->data_rate[pipe]));
-
return min_cdclk;
}