diff options
Diffstat (limited to 'drivers/gpu/nova-core/fb/hal/tu102.rs')
| -rw-r--r-- | drivers/gpu/nova-core/fb/hal/tu102.rs | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/drivers/gpu/nova-core/fb/hal/tu102.rs b/drivers/gpu/nova-core/fb/hal/tu102.rs index b022c781caf4..eec984f4e816 100644 --- a/drivers/gpu/nova-core/fb/hal/tu102.rs +++ b/drivers/gpu/nova-core/fb/hal/tu102.rs @@ -1,10 +1,13 @@ // SPDX-License-Identifier: GPL-2.0 -use crate::driver::Bar0; -use crate::fb::hal::FbHal; -use crate::regs; use kernel::prelude::*; +use crate::{ + driver::Bar0, + fb::hal::FbHal, + regs, // +}; + /// Shift applied to the sysmem address before it is written into `NV_PFB_NISO_FLUSH_SYSMEM_ADDR`, /// to be used by HALs. pub(super) const FLUSH_SYSMEM_ADDR_SHIFT: u32 = 8; @@ -15,15 +18,13 @@ pub(super) fn read_sysmem_flush_page_gm107(bar: &Bar0) -> u64 { pub(super) fn write_sysmem_flush_page_gm107(bar: &Bar0, addr: u64) -> Result { // Check that the address doesn't overflow the receiving 32-bit register. - if addr >> (u32::BITS + FLUSH_SYSMEM_ADDR_SHIFT) == 0 { - regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::default() - .set_adr_39_08((addr >> FLUSH_SYSMEM_ADDR_SHIFT) as u32) - .write(bar); - - Ok(()) - } else { - Err(EINVAL) - } + u32::try_from(addr >> FLUSH_SYSMEM_ADDR_SHIFT) + .map_err(|_| EINVAL) + .map(|addr| { + regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::default() + .set_adr_39_08(addr) + .write(bar) + }) } pub(super) fn display_enabled_gm107(bar: &Bar0) -> bool { |