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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/reset/renesas,rzg2l-usbphy-ctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/{G2L,V2L} USBPHY Control
maintainers:
- Biju Das <biju.das.jz@bp.renesas.com>
description:
The RZ/G2L USBPHY Control mainly controls reset and power down of the
USB/PHY.
properties:
compatible:
oneOf:
- items:
- enum:
- renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
- renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
- renesas,r9a07g054-usbphy-ctrl # RZ/V2L
- const: renesas,rzg2l-usbphy-ctrl
- const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S
reg:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
power-domains:
maxItems: 1
'#reset-cells':
const: 1
description: |
The phandle's argument in the reset specifier is the PHY reset associated
with the USB port.
0 = Port 1 Phy reset
1 = Port 2 Phy reset
regulator-vbus:
type: object
description: USB VBUS regulator
$ref: /schemas/regulator/regulator.yaml#
unevaluatedProperties: false
renesas,sysc-pwrrdy:
description:
The system controller PWRRDY indicates to the USB PHY if the power supply
is ready. PWRRDY needs to be set during power-on before applying any
other settings. It also needs to be set before powering off the USB.
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description:
System controller phandle required by USB PHY CTRL driver to set
PWRRDY
- description: Register offset associated with PWRRDY
- description: Register bitmask associated with PWRRDY
required:
- compatible
- reg
- clocks
- resets
- power-domains
- '#reset-cells'
- regulator-vbus
allOf:
- if:
properties:
compatible:
contains:
const: renesas,r9a08g045-usbphy-ctrl
then:
required:
- renesas,sysc-pwrrdy
else:
properties:
renesas,sysc-pwrrdy: false
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/r9a07g044-cpg.h>
phyrst: usbphy-ctrl@11c40000 {
compatible = "renesas,r9a07g044-usbphy-ctrl",
"renesas,rzg2l-usbphy-ctrl";
reg = <0x11c40000 0x10000>;
clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>;
resets = <&cpg R9A07G044_USB_PRESETN>;
power-domains = <&cpg>;
#reset-cells = <1>;
regulator-vbus {
regulator-name = "vbus";
};
};
|
