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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2025, Altera Corporation
*/
#include "socfpga_agilex5.dtsi"
/ {
model = "SoCFPGA Agilex3 SoCDK";
compatible = "intel,socfpga-agilex3-socdk", "intel,socfpga-agilex3",
"intel,socfpga-agilex5";
aliases {
serial0 = &uart0;
ethernet2 = &gmac2;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
/delete-node/ cpu@2;
/delete-node/ cpu@3;
};
leds {
compatible = "gpio-leds";
led0 {
label = "hps_led0";
gpios = <&porta 1 GPIO_ACTIVE_HIGH>;
};
led1 {
label = "hps_led1";
gpios = <&porta 12 GPIO_ACTIVE_HIGH>;
};
};
memory@80000000 {
device_type = "memory";
/* We expect the bootloader to fill in the reg */
reg = <0x0 0x80000000 0x0 0x0>;
};
};
&gmac2 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&emac2_phy0>;
max-frame-size = <9000>;
mdio0 {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
emac2_phy0: ethernet-phy@0 {
reg = <0>;
rxc-skew-ps = <0>;
rxdv-skew-ps = <0>;
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
txc-skew-ps = <0>;
txen-skew-ps = <60>;
txd0-skew-ps = <60>;
txd1-skew-ps = <60>;
txd2-skew-ps = <60>;
txd3-skew-ps = <60>;
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&osc1 {
clock-frequency = <25000000>;
};
&qspi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;
m25p,fast-read;
cdns,read-delay = <2>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
qspi_boot: partition@0 {
label = "u-boot";
reg = <0x0 0x00c00000>;
};
root: partition@c00000 {
label = "root";
reg = <0x00c00000 0x03400000>;
};
};
};
};
&smmu {
status = "okay";
};
&uart0 {
status = "okay";
};
&watchdog0 {
status = "okay";
};
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