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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
* Copyright (c) 2024 Uwe Kleine-König
*/
/dts-v1/;
#include "rk3568-qnap-tsx33.dtsi"
/ {
model = "Qnap TS-433-4G NAS System 4-Bay";
compatible = "qnap,ts433", "rockchip,rk3568";
aliases {
ethernet0 = &gmac0;
};
vcc3v3_pcie: regulator-vcc3v3-pcie {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
vin-supply = <&dc_12v>;
};
};
/* connected to sata2 */
&combphy2 {
status = "okay";
};
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-handle = <&rgmii_phy0>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
status = "okay";
};
&i2c1 {
/* eeprom for vital-product-data on the backplane */
eeprom@56 {
compatible = "giantec,gt24c04a", "atmel,24c04";
reg = <0x56>;
label = "VPD_BP";
num-addresses = <2>;
pagesize = <16>;
read-only;
};
};
&leds {
led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK;
gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>;
label = "hdd2:green:disk";
linux,default-trigger = "disk-activity";
pinctrl-names = "default";
pinctrl-0 = <&hdd2_led_pin>;
};
led-2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK;
gpios = <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>;
label = "hdd3:green:disk";
linux,default-trigger = "disk-activity";
pinctrl-names = "default";
pinctrl-0 = <&hdd3_led_pin>;
};
led-3 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK;
gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
label = "hdd4:green:disk";
linux,default-trigger = "disk-activity";
pinctrl-names = "default";
pinctrl-0 = <&hdd4_led_pin>;
};
};
&mcu {
compatible = "qnap,ts433-mcu";
};
&mdio0 {
rgmii_phy0: ethernet-phy@3 {
/* Motorcomm YT8521 phy */
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x3>;
pinctrl-0 = <ð_phy0_reset_pin>;
pinctrl-names = "default";
reset-assert-us = <10000>;
reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
};
};
&pcie30phy {
data-lanes = <1 2>;
status = "okay";
};
/* Connected to a JMicron AHCI SATA controller */
&pcie3x1 {
reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
/* Connected to the 2.5G NIC for the upper network jack */
&pcie3x2 {
num-lanes = <1>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pinctrl {
gmac0 {
eth_phy0_reset_pin: eth-phy0-reset-pin {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
hdd2_led_pin: hdd2-led-pin {
rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
};
hdd3_led_pin: hdd3-led-pin {
rockchip,pins = <1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>;
};
hdd4_led_pin: hdd4_led-pin {
rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&sata2 {
status = "okay";
};
&usb2phy1 {
status = "okay";
};
/* connected to usb_host1_ehci/ohci */
&usb2phy1_host {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
/* connected to usb_host0_ehci/ohci */
&usb2phy1_otg {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
/* right port backside */
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
/* left port backside */
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
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