1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
|
// SPDX-License-Identifier: GPL-2.0-only or MIT
/*
* Device Tree file for the AM62L main domain peripherals
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
*
* Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4
*/
&cbass_main {
gic500: interrupt-controller@1800000 {
compatible = "arm,gic-v3";
reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
<0x00 0x01840000 0x00 0xc0000>, /* GICR */
<0x01 0x00000000 0x00 0x2000>, /* GICC */
<0x01 0x00010000 0x00 0x1000>, /* GICH */
<0x01 0x00020000 0x00 0x2000>; /* GICV */
ranges;
#address-cells = <2>;
#size-cells = <2>;
#interrupt-cells = <3>;
interrupt-controller;
/*
* vcpumntirq:
* virtual CPU interface maintenance interrupt
*/
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
gic_its: msi-controller@1820000 {
compatible = "arm,gic-v3-its";
reg = <0x00 0x01820000 0x00 0x10000>;
socionext,synquacer-pre-its = <0x1000000 0x400000>;
msi-controller;
#msi-cells = <1>;
};
};
gpio0: gpio@600000 {
compatible = "ti,am64-gpio", "ti,keystone-gpio";
reg = <0x00 0x00600000 0x00 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gic500>;
interrupts = <GIC_SPI 260 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 261 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 262 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 263 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 267 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&scmi_pds 34>;
clocks = <&scmi_clk 140>;
clock-names = "gpio";
ti,ngpio = <126>;
ti,davinci-gpio-unbanked = <0>;
};
gpio2: gpio@610000 {
compatible = "ti,am64-gpio", "ti,keystone-gpio";
reg = <0x00 0x00610000 0x00 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gic500>;
interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 281 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 283 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 284 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 285 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 286 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 287 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&scmi_pds 35>;
clocks = <&scmi_clk 141>;
clock-names = "gpio";
ti,ngpio = <79>;
ti,davinci-gpio-unbanked = <0>;
};
timer0: timer@2400000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2400000 0x00 0x400>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 58>;
clock-names = "fck";
power-domains = <&scmi_pds 15>;
ti,timer-pwm;
};
timer1: timer@2410000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2410000 0x00 0x400>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 63>;
clock-names = "fck";
power-domains = <&scmi_pds 16>;
ti,timer-pwm;
};
timer2: timer@2420000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2420000 0x00 0x400>;
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 77>;
clock-names = "fck";
power-domains = <&scmi_pds 17>;
ti,timer-pwm;
};
timer3: timer@2430000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2430000 0x00 0x400>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 82>;
clock-names = "fck";
power-domains = <&scmi_pds 18>;
ti,timer-pwm;
};
uart0: serial@2800000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02800000 0x00 0x100>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 89>;
clocks = <&scmi_clk 358>;
clock-names = "fclk";
status = "disabled";
};
uart1: serial@2810000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02810000 0x00 0x100>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 77>;
clocks = <&scmi_clk 312>;
clock-names = "fclk";
status = "disabled";
};
uart2: serial@2820000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02820000 0x00 0x100>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 78>;
clocks = <&scmi_clk 314>;
clock-names = "fclk";
status = "disabled";
};
uart3: serial@2830000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02830000 0x00 0x100>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 79>;
clocks = <&scmi_clk 316>;
clock-names = "fclk";
status = "disabled";
};
uart4: serial@2840000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02840000 0x00 0x100>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 80>;
clocks = <&scmi_clk 318>;
clock-names = "fclk";
status = "disabled";
};
uart5: serial@2850000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02850000 0x00 0x100>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 81>;
clocks = <&scmi_clk 320>;
clock-names = "fclk";
status = "disabled";
};
uart6: serial@2860000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02860000 0x00 0x100>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 82>;
clocks = <&scmi_clk 322>;
clock-names = "fclk";
status = "disabled";
};
conf: bus@9000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00 0x00 0x09000000 0x380000>;
phy_gmii_sel: phy@1be000 {
compatible = "ti,am654-phy-gmii-sel";
reg = <0x1be000 0x8>;
#phy-cells = <1>;
};
epwm_tbclk: clock-controller@1e9100 {
compatible = "ti,am62-epwm-tbclk";
reg = <0x1e9100 0x4>;
#clock-cells = <1>;
};
};
usbss0: dwc3-usb@f900000 {
compatible = "ti,am62-usb";
reg = <0x00 0x0f900000 0x00 0x800>,
<0x00 0x0f908000 0x00 0x400>;
clocks = <&scmi_clk 331>;
clock-names = "ref";
ti,syscon-phy-pll-refclk = <&usb_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&scmi_pds 95>;
ranges;
status = "disabled";
usb0: usb@31000000 {
compatible = "snps,dwc3";
reg = <0x00 0x31000000 0x00 0x50000>;
interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
snps,usb2-gadget-lpm-disable;
snps,usb2-lpm-disable;
};
};
usbss1: dwc3-usb@f910000 {
compatible = "ti,am62-usb";
reg = <0x00 0x0f910000 0x00 0x800>,
<0x00 0x0f918000 0x00 0x400>;
clocks = <&scmi_clk 338>;
clock-names = "ref";
ti,syscon-phy-pll-refclk = <&usb_phy_ctrl 0x4>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&scmi_pds 96>;
ranges;
status = "disabled";
usb1: usb@31100000 {
compatible = "snps,dwc3";
reg = <0x00 0x31100000 0x00 0x50000>;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
snps,usb2-gadget-lpm-disable;
snps,usb2-lpm-disable;
};
};
sdhci1: mmc@fa00000 {
compatible = "ti,j721e-sdhci-4bit";
reg = <0x00 0x0fa00000 0x00 0x1000>,
<0x00 0x0fa08000 0x00 0x400>;
interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 26>;
clocks = <&scmi_clk 106>, <&scmi_clk 109>;
clock-names = "clk_ahb", "clk_xin";
assigned-clocks = <&scmi_clk 109>;
bus-width = <4>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x0>;
ti,itap-del-sel-legacy = <0x0>;
status = "disabled";
};
sdhci0: mmc@fa10000 {
compatible = "ti,am62-sdhci";
reg = <0x00 0xfa10000 0x00 0x1000>,
<0x00 0xfa18000 0x00 0x400>;
interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 28>;
clocks = <&scmi_clk 122>, <&scmi_clk 125>;
clock-names = "clk_ahb", "clk_xin";
assigned-clocks = <&scmi_clk 125>;
bus-width = <8>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-hs200 = <0x6>;
status = "disabled";
};
sdhci2: mmc@fa20000 {
compatible = "ti,am62-sdhci";
reg = <0x00 0x0fa20000 0x00 0x1000>,
<0x00 0x0fa28000 0x00 0x400>;
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 27>;
clocks = <&scmi_clk 114>, <&scmi_clk 117>;
clock-names = "clk_ahb", "clk_xin";
assigned-clocks = <&scmi_clk 117>;
bus-width = <4>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x0>;
ti,itap-del-sel-legacy = <0x0>;
status = "disabled";
};
i2c0: i2c@20000000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x20000000 0x00 0x100>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 53>;
clocks = <&scmi_clk 246>;
clock-names = "fck";
status = "disabled";
};
i2c1: i2c@20010000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x20010000 0x00 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 54>;
clocks = <&scmi_clk 250>;
clock-names = "fck";
status = "disabled";
};
i2c2: i2c@20020000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x20020000 0x00 0x100>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 55>;
clocks = <&scmi_clk 254>;
clock-names = "fck";
status = "disabled";
};
i2c3: i2c@20030000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x20030000 0x00 0x100>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 56>;
clocks = <&scmi_clk 258>;
clock-names = "fck";
status = "disabled";
};
mcan0: can@20701000 {
compatible = "bosch,m_can";
reg = <0x00 0x20701000 0x00 0x200>,
<0x00 0x20708000 0x00 0x8000>;
reg-names = "m_can", "message_ram";
power-domains = <&scmi_pds 47>;
clocks = <&scmi_clk 179>, <&scmi_clk 178>;
clock-names = "hclk", "cclk";
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
mcan1: can@20711000 {
compatible = "bosch,m_can";
reg = <0x00 0x20711000 0x00 0x200>,
<0x00 0x20718000 0x00 0x8000>;
reg-names = "m_can", "message_ram";
power-domains = <&scmi_pds 48>;
clocks = <&scmi_clk 185>, <&scmi_clk 184>;
clock-names = "hclk", "cclk";
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
mcan2: can@20721000 {
compatible = "bosch,m_can";
reg = <0x00 0x20721000 0x00 0x200>,
<0x00 0x20728000 0x00 0x8000>;
reg-names = "m_can", "message_ram";
power-domains = <&scmi_pds 49>;
clocks = <&scmi_clk 191>, <&scmi_clk 190>;
clock-names = "hclk", "cclk";
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
spi0: spi@20100000 {
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
reg = <0x00 0x20100000 0x00 0x400>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 72>;
clocks = <&scmi_clk 299>;
status = "disabled";
};
spi1: spi@20110000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x00 0x20110000 0x00 0x400>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 73>;
clocks = <&scmi_clk 302>;
status = "disabled";
};
spi2: spi@20120000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x00 0x20120000 0x00 0x400>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 74>;
clocks = <&scmi_clk 305>;
status = "disabled";
};
spi3: spi@20130000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x00 0x20130000 0x00 0x400>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 75>;
clocks = <&scmi_clk 308>;
status = "disabled";
};
epwm0: pwm@23000000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
reg = <0x00 0x23000000 0x00 0x100>;
power-domains = <&scmi_pds 40>;
clocks = <&epwm_tbclk 0>, <&scmi_clk 164>;
clock-names = "tbclk", "fck";
#pwm-cells = <3>;
status = "disabled";
};
epwm1: pwm@23010000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
reg = <0x00 0x23010000 0x00 0x100>;
power-domains = <&scmi_pds 41>;
clocks = <&epwm_tbclk 1>, <&scmi_clk 165>;
clock-names = "tbclk", "fck";
#pwm-cells = <3>;
status = "disabled";
};
epwm2: pwm@23020000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
reg = <0x00 0x23020000 0x00 0x100>;
power-domains = <&scmi_pds 42>;
clocks = <&epwm_tbclk 2>, <&scmi_clk 166>;
clock-names = "tbclk", "fck";
#pwm-cells = <3>;
status = "disabled";
};
ecap0: pwm@23100000 {
compatible = "ti,am3352-ecap";
reg = <0x00 0x23100000 0x00 0x100>;
power-domains = <&scmi_pds 23>;
clocks = <&scmi_clk 99>;
clock-names = "fck";
#pwm-cells = <3>;
status = "disabled";
};
ecap1: pwm@23110000 {
compatible = "ti,am3352-ecap";
reg = <0x00 0x23110000 0x00 0x100>;
power-domains = <&scmi_pds 24>;
clocks = <&scmi_clk 100>;
clock-names = "fck";
#pwm-cells = <3>;
status = "disabled";
};
ecap2: pwm@23120000 {
compatible = "ti,am3352-ecap";
reg = <0x00 0x23120000 0x00 0x100>;
power-domains = <&scmi_pds 25>;
clocks = <&scmi_clk 101>;
clock-names = "fck";
#pwm-cells = <3>;
status = "disabled";
};
eqep0: counter@23200000 {
compatible = "ti,am62-eqep";
reg = <0x00 0x23200000 0x00 0x100>;
power-domains = <&scmi_pds 29>;
clocks = <&scmi_clk 127>;
interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
eqep1: counter@23210000 {
compatible = "ti,am62-eqep";
reg = <0x00 0x23210000 0x00 0x100>;
power-domains = <&scmi_pds 30>;
clocks = <&scmi_clk 128>;
interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
eqep2: counter@23220000 {
compatible = "ti,am62-eqep";
reg = <0x00 0x23220000 0x00 0x100>;
power-domains = <&scmi_pds 31>;
clocks = <&scmi_clk 129>;
interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
elm0: ecc@25010000 {
compatible = "ti,am64-elm";
reg = <0x00 0x25010000 0x00 0x2000>;
interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 25>;
clocks = <&scmi_clk 102>;
clock-names = "fck";
status = "disabled";
};
gpmc0: memory-controller@3b000000 {
compatible = "ti,am64-gpmc";
power-domains = <&scmi_pds 37>;
clocks = <&scmi_clk 149>;
clock-names = "fck";
reg = <0x00 0x3b000000 0x00 0x400>,
<0x00 0x50000000 0x00 0x8000000>;
reg-names = "cfg", "data";
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
gpmc,num-cs = <3>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
status = "disabled";
};
oc_sram: sram@70800000 {
compatible = "mmio-sram";
reg = <0x00 0x70800000 0x00 0x10000>;
ranges = <0x00 0x00 0x70800000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
scmi_shmem: sram@0 {
compatible = "arm,scmi-shmem";
reg = <0x00 0x100>;
bootph-all;
};
};
};
|
